5d96bba97e
rk3568: add nand support for spl and uboot
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I3b849db025ae15dde22636ae17ac2d19c5484dd6
2020-11-30 09:53:23 +08:00
568252a02c
rockchip: spl-boot-order: support scan rknand device
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I49da396e3e8d10572be9b9f9dac57bd317c4cf83
2020-11-30 09:53:23 +08:00
ffc357038c
spl: support boot from rknand device
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I168ec42ec1ac4bc1e8b640fba22357cde4a26aac
2020-11-30 09:53:12 +08:00
e18e709024
drivers: rknand: add nand flash drivers for spl
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Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I21c449226f57f2ff05fdcf241dde014062634cb5
2020-11-27 20:06:23 +08:00
d7965d03e2
pinctrl: rockchip: add SPL support
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CONFIG_OF_LIVE is always available in SPL and U-Boot.
Use CONFIG_IS_ENABLED(OF_LIVE) to unwind as CONFIG_OF_LIVE
in U-Boot and CONFIG_SPL_OF_LIVE in SPL.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I980579d54850ca7655b464688ba9e6bd35f24250
2020-11-27 14:05:18 +08:00
186b00109f
rockchip: rk3568: place U-Boot at 10MB offset
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2~10MB region is for OP-TEE.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic4d4beb9e42a2b17665102c811e59b5864cbc888
2020-11-26 15:43:56 +08:00
39b9f515bc
spl: fit: update U-Boot entry point by image info
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Otherwise it depends on static value CONFIG_SYS_TEXT_BASE
if the image node can't be found in "/fit-images".
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I103bd3467baaefb816ab34d7a2bf37547113e431
2020-11-26 15:43:56 +08:00
69a04b4fa5
spl: atf: traverse all "/fit-images" sub nodes
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Fix find sub nodes failed.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2cb885028da9711a15f001fdd48e9d273cfd348a
2020-11-26 15:43:56 +08:00
038c1ecaa2
power: charge animation: energy enough auto exit uboot charge
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Change-Id: Ifa94783869c7cb35f819f3700c82bac7d00a7b05
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
2020-11-26 15:23:46 +08:00
14aa40ff18
scritps: fit: add "--burn-key-hash" support
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It sets "burn-key-hash = <0>" to "burn-key-hash = <1>" which
enables SPL burn root-key hash to OTP.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I65f4b8f3603fff25d42b576b65ea86733d60ae56
2020-11-26 14:44:34 +08:00
4129064579
scritps: fit: use more strict replace pattern for "rolback-index"
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Icfc23e1f7338842a565be5b691a8f14e003d1644
2020-11-26 14:44:34 +08:00
34b05be1cb
rockchip: make_fit_optee/atf: add "burn-key-hash = <0>".
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It is available when verified boot is enabled, to active
this feature: ./make.sh ... --burn-key-hash
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2224bae079f12d48609989b080b287dfe4fd2cb3
2020-11-26 14:44:34 +08:00
00d11ef213
pmic: rk8xx: support power key config from dts
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Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I4b2def4e5b171b2b46f26695e9cabec8a7b496e2
2020-11-26 11:51:28 +08:00
c91220724d
configs: rv1126-spi-nor-tb.config: update base on rv1126-spi-nor-tiny_defconfig
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Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ib413a9480c007223ea406fa082d324302fe8a111
2020-11-26 09:26:35 +08:00
e336ce4ee5
mtd: spinand: Add foresee devices
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Change-Id: I115ea19030edc2e83e877621f055555b481f98db
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-26 09:10:57 +08:00
5d4ebb14fc
spl: modify the spl log
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Correct the log when bring up kernel with spl directly.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic3204d8ddab37c3a5aac3488e209b3764e96a977
2020-11-25 22:17:34 +08:00
0838e4e69d
rockchip: rv1126: Fix ram boot fail
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The OTP_S access is not allowed from the non-secure world.
so, remove it for ramboot which have already done in trust.
ram boot flow:
usb boot -> trust/op-tee -> uboot -> kernel -> rootfs
normal boot flow:
spl boot -> trust/op-tee -> uboot -> kernel -> rootfs
Fixes: 1ac424cf03
2020-11-25 15:35:28 +08:00
65bd598f41
clk: rockchip: rk3568: set the ACLK_BUS to 150MHz in spl
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Since the mcu uses the ACLK_BUS clock and 150MHz is need as
default clock rate.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I60c4603fa0c0b45667c6583992ea461fed18fcf5
2020-11-24 17:13:18 +08:00
4623d13df7
spl: Kconfig: update SPL_KERNEL_BOOT_SECTOR depend on
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Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I0284e105960dd58690c779903c227c371a4611fc
2020-11-24 16:33:22 +08:00
d3ae171348
configs: rk3568: use hardware crypto for SHA/RSA
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I92f802e3bf01d652d3376e8e75f569a69ec34b58
2020-11-24 16:06:37 +08:00
00fa57d80d
driver: crypto: mask CRYPTO_SYNC_LOCKSTEP_INT_ST flag
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This flag maybe abnormal trigger.
Change-Id: Id398d1e8636c28b8cc42d950cafa5e2731a41b62
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
94d677da26
rockchip: dts: rk3568: add and enable crypto node
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Change-Id: I1ca3dc64c23663a5b30fc369f287f391d17ca3f3
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
1d1195dd87
configs: rk3568: enable crypto v2
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enable CONFIG_DM_CRYPTO
enable CONFIG_ROCKCHIP_CRYPTO_V2
Change-Id: I02be1839a60134bfc319fd695f5f878614b2e722
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
7eea182341
crypto: rockchip: support rk3568 without hwrng in crypto
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Change-Id: I557a05e0336fe6b80d903a48a2d088f165a4eeca
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
c7955c9b04
cmd: crypto: trng: deal with some device without hwrng in crypto
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some platform hardware rng module is no longer belongs to crypto module
such as rk3566/rk3568.
Change-Id: I500ff110fc7ef2361024c4d9d39c8f89cb92f3f0
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
a9e6d1e544
spl: mtd_blk: redefine the mtd device name
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Redefine the mtd device name according to the defination in
file blk.h:
BLK_MTD_NAND 0
BLK_MTD_SPI_NAND 1
BLK_MTD_SPI_NOR 2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I75df9f0405d351c61929ff65781bfd4a26f2a1a4
2020-11-24 14:47:34 +08:00
7ef28ab639
i2c: rockchip: Clean ipd status if i2c transfer error
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If there was an i2c transfer error like iomux error,
should clean the ipd status, it might cause kernel i2c
irq error handing.
[ 0.690749] rk3x-i2c fdd40000.i2c: irq in STATE_IDLE, ipd = 0x10
Change-Id: Ia127edada535288e9b984d6dc0dff813e6152eff
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-11-24 14:43:46 +08:00
8d0f4dce8f
configs: rv1126-ab.config: no bootdelay to save boot time
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Change-Id: Ib3db29eafa1d81360c15f94f0b9264c64d8b56cc
Signed-off-by: Mark Huang <huangjc@rock-chips.com>
2020-11-23 19:35:18 +08:00
e6cf5feaac
configs: rk3568: enable uboot charge
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Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I571541f315d689286d9caaa6fda19491702101ea
2020-11-23 14:21:49 +08:00
757632eec4
rockchip: rk3568: enable GICV3
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I98e121cf4300631c04793c73e7af3bef1f1009d9
2020-11-23 14:21:15 +08:00
2c36608a71
rockchip: rk3568: init core pvtpll ring length
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Change-Id: I2a7957ce1c2b38dec984c6b4f36392f92c185190
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-21 11:29:33 +08:00
666b2d1f24
rockchip: boot-mode: clean up rockchip_get_boot_mode()
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Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4a11fa846a8fd74ecffe1ee0ac46ebdeaa2413a7
2020-11-20 21:17:34 +08:00
ea8b124a0e
rockchip: boot-mode: fix lost boot-mode from register
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PH and PL is from boot mode register, reading once.
PM is from misc.img and should be updated if BCB offset is changed.
Return the boot mode according to priority: PH > PM > PL.
Fixes:
(3aaa96e8af
2020-11-20 21:17:34 +08:00
22edf95882
mtd: spinand: Support W25N02KV
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Change-Id: Iaf4a50ce7bb0bb9978a05d339a34763445c09c84
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-20 20:54:39 +08:00
b833c879cf
rkflash: Support new spi flash
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1.Support W25N02KVZEIR
2.Support GD25B512MEYIG, MX25U51245G
Change-Id: Ia0181aa3fc6cbf17e2b0abd43dea80b5d9848d88
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-20 20:31:21 +08:00
cd081a9734
spl: rkfw: fix printing error message
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I4cfd0de01b826aaa21c7269e1b814e234670561a
2020-11-20 15:57:44 +08:00
2d25c32e07
rockchip: dts: rk3568: Resync from kernel-4.19
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Resync from kernel-4.19:
(2f153f1fa73c arm64: dts: rockchip: rk3568: add thermal-zone for pvtm)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I36fdfc366f4d44f3226b6f8b35ee496701fe021e
2020-11-19 15:34:01 +08:00
6a71ec51e6
configs: remove rk3566.config
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rk3566.config is not ready to be used.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I1635dd9b0b86ddad4644bff58e3fa2337f7ebbe7
2020-11-19 14:59:17 +08:00
dbff1ed621
gpio: rockchip: get gpio bank from pinctrl device
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Change-Id: I0dd2bc1b61bfdfe8edfd79b3a794522499eaae5c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
e9c98b3baf
gpio: rockchip: fix get gpio mux operation error return
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Change-Id: Ia225ae3acea2d2d2347870b3d6a20c4a7d22e7e9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
8273b391c5
pinctrl: rockchip: a pin unrouted is invalid
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Change-Id: I706b23277f33768fc7c8bcfd06e6417fe3e8a0db
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
fdd74c3220
clk: rockchip: rk3568: support ebc clk setting/getting rate
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Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-19 14:48:18 +08:00
d181efcb77
rockchip: rk3568: delete useless code
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Idf90798700f1128d275d0311ed50ed531acaa42c
2020-11-18 17:26:20 +08:00
a741b19cf7
spl: fit: map the bad block table depending on the image's size
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6a257327fce16c8bf5ce10c8cbae0b60e044eb88
2020-11-18 16:11:15 +08:00
661bcdfeff
mtd: mtd_blk: add mtd_blk_map_fit() to create map for fit image
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Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0d0195f455ee9afb32676510fc077fe63ae5c7ad
2020-11-18 16:10:55 +08:00
bccbe93430
configs: rk3308: add tpl support
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Change-Id: Idd2b4f087d8d281edb750c6e65ac325b2729cd46
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-18 10:19:08 +08:00
379e9cabde
drivers: ram: rk3308: add sdram_rk3308.c build
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Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-17 20:56:28 +08:00
046cd38054
rockchip: rk3568: disable eDP phy to save power
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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4b94c5c28196f72c9d41efe7bdb9eb837eb6adf4
2020-11-17 19:51:52 +08:00
b85730d9e9
clk: rockchip: rv1126: Fix mask bits for gmac src clks
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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a
2020-11-17 14:46:27 +08:00
a1a5fedba4
configs: rk3568: enable dwc3 host port
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Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I8272b1a405c4d558c4eec5f035f776b70dffa574
2020-11-17 14:45:45 +08:00
Yifeng Zhao
Joseph Chen
Shunqing Chen
Weiwen Chen
Jon Lin
Jason Zhu
Sugar Zhang
Lin Jinhan
David Wu
Mark Huang
Elaine Zhang
Jianqun Xu
Zhihuan He
Wyon Bi
Finley Xiao
Ren Jianing