The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci
Change-Id: I13705562893b30327708fbc321547bac79615785
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 1708a12377b98397606677e117f93f07d7cd2f7e)
This quirk is necessary for the Amlogic GXL SoCs otherwise the
Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:
XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!
This quirk is also handled in the dwc3 core code, but until the
xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
to fix USB support on the Amlogic libretech-cc and libretech-ac board
when a device is only plugged in the OTG port.
Change-Id: Iba72fb52411856785b6bd6ed829e1585ba00bebe
Cc: Yuri Frolov <crashing.kernel@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit b35b8076828d1059c1fcc648ed8c8210ebe6a3dd)
Configure USB2 PHY register based on "phy_type" property and
handle all the quirks that are relevant for Rockchip RK3399 SoCs.
Change-Id: Idac50a031e8e924712fef8ad61a622f8e85f3e86
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 062790f461312f1b954ae876f85da8f6ce5fcc73)
Those operations can be used for peripheral operation as well as host
operation.
Change-Id: Ifa3b83bd690cd11f6750fd893e6ac36b2a0214b3
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit d648a50c0a27452a5439e7982b23b97c64820430)
This allows to disable the USB driver model in SPL because it checks
the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
regular non-SPL builds.
Conflicts:
drivers/usb/host/ehci-atmel.c
drivers/usb/host/xhci-fsl.c
Change-Id: If6c980c620cf97c1dd131f60953c305e34dba505
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit fd09c205fc57b90a782cac33449ef172575d0a8c)
When no PHYs are declared in the dwc3 node, the phy init fails.
This patch checks if the "phys" property is presend and reports
the error returned by dev_count_phandle_with_args().
This patchs also fixes the styles issues added in last commit.
This patch should fix the DWC3 support on the UniPhier SoC family.
Change-Id: I59c50f81dfd695a2a8047ed13c1af21af64b044b
Fixes: 7c839ea70c49 ("usb: host: dwc3: Add support for multiple PHYs")
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 003659bda94a1444ebdfefea3f0928f8e90f9d8f)
DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.
Change-Id: Iaea6c612c8b4c8b2bc0e03303e45371db5630c35
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 7c839ea70c4991e8d4c322e074359ac5e155d59d)
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
Change-Id: I84353e548c844d599d56df9702b75972f636a2b3
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 2fd4242cc50e2da6666028e65a10467171e3dab6)
Refractor PHY get/init/poweron and PHY poweroff/exit operations into
separate function so that its easy to support multiple PHYs.
Change-Id: I837032c52bfa9360cc8bbf5fa38eb35e83155db6
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 3fc2635d3da8f87675629b6058b646b63d684dff)
It is wrong that expect .phy_init() to also power on the PHY. Therefore,
explicitly, call generic_phy_power_on() after generic_phy_power_init() in
order to power on PHY before using it.
Change-Id: I587d32f108148813e5eb7b7039b0af9daf15d774
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 7d4e4d30631ba9350a18ab2243e749d583b402ab)
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
Fix following warnings encountered with platforms
dra7xx_evm and dra7xx_hs_evm :
arm: + dra7xx_evm
+ hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
+ ^
+ hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+ ^
w+drivers/usb/host/xhci-dwc3.c: In function 'xhci_dwc3_probe':
w+drivers/usb/host/xhci-dwc3.c:124:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
w+drivers/usb/host/xhci-dwc3.c:125:30: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
w+drivers/usb/host/xhci-dwc3.c:125:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
arm: + dra7xx_hs_evm
+ hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
+ ^
+ hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+ ^
w+drivers/usb/host/xhci-dwc3.c: In function 'xhci_dwc3_probe':
w+drivers/usb/host/xhci-dwc3.c:124:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
w+drivers/usb/host/xhci-dwc3.c:125:30: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
w+drivers/usb/host/xhci-dwc3.c:125:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Introduced by 7e65e84 usb: host: xhci-dwc3: Convert driver to DM
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add CONFIG_DM_USB flag to avoid following compilation errors
detected by buildman :
+drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
+drivers/usb/host/xhci-dwc3.c:168: undefined reference to `xhci_deregister'
+drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
+drivers/usb/host/xhci-dwc3.c:145: undefined reference to `usb_get_dr_mode'
+drivers/usb/host/xhci-dwc3.c:152: undefined reference to `xhci_register'
introduced by patch d5c3f014da3 "usb: host: xhci-dwc3: Convert driver to DM"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Ran Wang <ran.wang_1@nxp.com>
Add support of generic PHY framework support
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
DWC3 dual role mode is selected using DT "dr_mode"
property. If not found, DWC3 controller is configured
in HOST mode by default
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Driver Model support with use of generic DT
compatible string "snps,dwc3"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As per dwc3 databook, delay is required before taking the core out of reset.
This delay is required so that the PHY are stable, and then we can take core
out of reset.
Reference is taken from linux dwc3 code, file: drivers/usb/dwc3/core.c.
Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Jean-Jacques Hiblot
Neil Armstrong
Mark Kettenis
Sven Schwermer
Vignesh R
Masahiro Yamada
Patrice Chotard
Rajesh Bhagat
Nikhil Badola
Ramneek Mehresh