Commit Graph

51052 Commits

Author SHA1 Message Date
Joseph Chen 2d25c32e07 rockchip: dts: rk3568: Resync from kernel-4.19
Resync from kernel-4.19:
(2f153f1fa73c arm64: dts: rockchip: rk3568: add thermal-zone for pvtm)

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I36fdfc366f4d44f3226b6f8b35ee496701fe021e
2020-11-19 15:34:01 +08:00
Joseph Chen 6a71ec51e6 configs: remove rk3566.config
rk3566.config is not ready to be used.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I1635dd9b0b86ddad4644bff58e3fa2337f7ebbe7
2020-11-19 14:59:17 +08:00
Jianqun Xu dbff1ed621 gpio: rockchip: get gpio bank from pinctrl device
Change-Id: I0dd2bc1b61bfdfe8edfd79b3a794522499eaae5c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
Jianqun Xu e9c98b3baf gpio: rockchip: fix get gpio mux operation error return
Change-Id: Ia225ae3acea2d2d2347870b3d6a20c4a7d22e7e9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
Jianqun Xu 8273b391c5 pinctrl: rockchip: a pin unrouted is invalid
Change-Id: I706b23277f33768fc7c8bcfd06e6417fe3e8a0db
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-19 14:50:05 +08:00
Elaine Zhang fdd74c3220 clk: rockchip: rk3568: support ebc clk setting/getting rate
Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-19 14:48:18 +08:00
Jason Zhu d181efcb77 rockchip: rk3568: delete useless code
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Idf90798700f1128d275d0311ed50ed531acaa42c
2020-11-18 17:26:20 +08:00
Jason Zhu a741b19cf7 spl: fit: map the bad block table depending on the image's size
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6a257327fce16c8bf5ce10c8cbae0b60e044eb88
2020-11-18 16:11:15 +08:00
Jason Zhu 661bcdfeff mtd: mtd_blk: add mtd_blk_map_fit() to create map for fit image
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0d0195f455ee9afb32676510fc077fe63ae5c7ad
2020-11-18 16:10:55 +08:00
Zhihuan He bccbe93430 configs: rk3308: add tpl support
Change-Id: Idd2b4f087d8d281edb750c6e65ac325b2729cd46
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-18 10:19:08 +08:00
Zhihuan He 379e9cabde drivers: ram: rk3308: add sdram_rk3308.c build
Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-17 20:56:28 +08:00
Wyon Bi 046cd38054 rockchip: rk3568: disable eDP phy to save power
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4b94c5c28196f72c9d41efe7bdb9eb837eb6adf4
2020-11-17 19:51:52 +08:00
Finley Xiao b85730d9e9 clk: rockchip: rv1126: Fix mask bits for gmac src clks
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a
2020-11-17 14:46:27 +08:00
Ren Jianing a1a5fedba4 configs: rk3568: enable dwc3 host port
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I8272b1a405c4d558c4eec5f035f776b70dffa574
2020-11-17 14:45:45 +08:00
Ren Jianing 08d283a46e rockchip: dts: rk3568: disable usb2 host by default
If we enable usb2phy1 with dm-pre-reloc in uboot and disable it
in kernel, the status of usb2phy1 will be "okay" and usb2phy1
node will be put ahead of usb2phy0 which leads to vbus detect
fail.

Here is the error log:
  get syscon usbgrf failed
  rockchip_chg_get_type: get u2phy node failed: -19

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I16c1ddd42bf1a2e7a98fc9cdf1509a62714c8b6b
2020-11-17 14:45:08 +08:00
Jason Zhu 0934588e54 rockchip: rk3568: support bring-up the mcu
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ib992d4ebe078d8d8752f72c8a9824e85b5f24da2
2020-11-17 10:58:45 +08:00
Jason Zhu bb82cbf82d rockchip: rv1126: hold a few time for mcu to capture the boot address
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: If30b429577e715d2851eaab1c0fa6a84f0ad8850
2020-11-17 10:20:15 +08:00
Zhihuan He 8ec8d58eeb drivers: ram: rockchip: add rk3308 sdram driver
Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:40:52 +08:00
Zhihuan He b86c816ccb drivers: ram: rockchip: rv1108: clean up the code
Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:39:39 +08:00
Zhihuan He ad11931911 rockchip: tpl: add arch_cpu_init()
The arch_cpu_init() should be called for cpu early init
for tpl.

Change-Id: I3aad0f284089d8523710a2d24daab44995fa148d
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2020-11-16 20:39:39 +08:00
Ren Jianing 7329ce5782 phy: rockchip-inno-usb2: fix some issues for rk3568 usb2 phy
This patch fixes the following issues for rk3568 usb2 phy.

1. Set utmi opmode to normal mode for rk3568 usb phy when usb
phy enter suspend mode via usb phy grf. It can help to avoid
the DM/DP floating and the line state be detected as 2'b11.

2. Fix the offset of INT_STATUS_CLR. It can help to avoid
triggering the linestate irq constantly.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ic108e116d1473341b61743ec4244bc034a95f501
2020-11-16 15:59:44 +08:00
Elaine Zhang 802c460a72 clk: rockchip: rk3568: support ppll setting 200M
Change-Id: If5d4d1994956a8e18f3208a22daee6efca80950b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-16 15:05:05 +08:00
David Wu 458cbae45a power: rockchip-io-domain: Use private write for rk3568
The i2c5 xfer went wrong because of io-domain was not right
and was configured correctly in uboot to ensure that kernel
was right before initializing the io-domain driver.

Change-Id: Ic2f94952f7a851dc5b781af9f31bba2562b5a2b5
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-11-16 11:45:51 +08:00
Joseph Chen ede15112c2 scripts: fit-msg.sh: read components image message
Support get commit version of components image.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic279ed457949a98693571ec2a8ff2cfac4e0469d
2020-11-14 09:00:35 +00:00
Joseph Chen aa8e825b4b rockchip: rename fit.c => fit_misc.c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8afc870973d75f5e0e3bc968eaf6966f1696ac77
2020-11-14 08:35:40 +00:00
Joseph Chen d4f6d8e395 scripts: android2fit.sh transform Android image to FIT image
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0c448d101aa4912398efa528275119132f434f69
2020-11-14 08:28:45 +00:00
Joseph Chen 8db677370c irq: irq-gpio-switch: add gpio alias name support
Before the patch, we get gpio index(0,1,2..) depends on gpio
fdt node name, such as: gpio0@..., gpio1@..., etc.

But from RK3568, we add gpio alias to indicate gpio index
information and index is removed from gpio node name, ie:
gpio@fdd60000, gpio@fe740000, etc.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I56e45941f9572fbc6a5a5916896e12f6eff9dcf3
2020-11-14 15:32:03 +08:00
Joseph Chen 9d23fbe3b7 spl: fit: load kernel dtb if need
kernel FDT is for U-Boot if there is not valid one from images,
ie: resource.img, boot.img or recovery.img. It is put right
after U-Boot FDT.

This is used for U-disk bing up.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I348b6ea5736f46c091284c501e7e0f9c64cd2f78
2020-11-14 15:32:03 +08:00
Joseph Chen a14492767c rockchip: make_fit_atf/optee.sh: add "kernel-fdt" node
kernel FDT is for U-Boot if there is not valid one from images,
ie: resource.img, boot.img or recovery.img. It is put right
after U-Boot FDT.

This is used for U-disk bing up.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iab1ddbbf3978a6b2fc08316bb136c43c0d2eef60
2020-11-14 15:32:03 +08:00
Joseph Chen 20647277f1 rockchip: kernel-dtb: check mismatch of kernel dtb
Simply check cru node to verify if this kernel dtb
is belong to current platform.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8c0b2181a2ca3cada72a9e18788de0bfdc9ba3c5
2020-11-14 15:32:03 +08:00
Joseph Chen d6e082ceff common: board_f: print kern.dtb address
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8f593632676cad3758c37d5a027932bc1302f0d5
2020-11-14 15:32:03 +08:00
Joseph Chen cab35d601e make.sh: use "atf-1" to check uboot.img
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I49004f1dac8eaedd11c449ab7f6e6fba7c0605c4
2020-11-14 15:25:33 +08:00
Joseph Chen 7d70ffaead rockchip: make_fit_atf.sh: use "-" instead of "@"
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I02b6a5f376184ea50c0db8714d225a1cd0cb39e1
2020-11-14 15:25:33 +08:00
David Wu e4e3f4318d net: gmac_rockchip: Add rmii support for rv1126
Change-Id: I89401b89ff8fd3d9cca754d6f1c05dc76ef2cda6
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-11-14 15:23:48 +08:00
Weiwen Chen 9fb3fe4220 configs: rv1126: enable cmd mtd for spi nand erase/write/read
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie4eba0bba18d44bca12a80df0083d1bf018a74d2
2020-11-14 15:23:31 +08:00
William Wu 3b2dd5de37 usb: dwc3: do not use 3.0 clock when operating in 2.0 mode
In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.

Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-11-14 12:05:13 +08:00
Jason Zhu cce972667a rockchip: rk3568: set the emmc drive strength to level 2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic515e9aa81448ac1abcf378e9f4cd9b08247bdde
2020-11-14 11:55:39 +08:00
Jason Zhu 60238d95dc mmc: sdhci: rockchip: change tapnum to 16
According to the test hadware testing.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I2750a7de9f79807256800868ae53d3fe4a23b2f1
2020-11-14 11:55:39 +08:00
Joseph Chen 258d2dcb26 env: Kconfig: add entry for ENV offset and size
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8609519d0dc5519b57201406d1f7ae4948b0e9b3
2020-11-13 09:22:12 +00:00
Joseph Chen 2c655b73ba lib: sysmem: update help of "sysmem_search" command
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie747d258fa00301c488f5747cf729c242e4d6033
2020-11-12 13:12:09 +00:00
Jon Lin ca319403be configs: rk3568: Enable spinor
Change-Id: I8c6ae405ad70a13e2ee8624c99db588d71fc33ed
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-12 20:12:27 +08:00
Yifeng Zhao 007849d805 drivers: rockusb: add new idb feature for rk3568
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iee5ed01bb336a5b5994381fc8e734da3b87329fe
2020-11-12 20:12:17 +08:00
Elaine Zhang 9f408268dc rockchip: rk3568: support rockchip_get_cru for rk3568
Change-Id: I2029c26da80b5ed5cd18e154751688fd29862813
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-12 10:32:25 +08:00
Yifeng Zhao 8d74d6b7d3 drivers: mmc: rockchip: rk3568: config rx clock no inverter for hs200
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I426a5c3ee0899fbd54711e13550310f77f8abd3e
2020-11-11 19:48:46 +08:00
Jason Zhu b48cb5c290 rockchip: dts: rk3568: set emmc bus width to 8
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ifdbe8ed76caa746070c3c5cf166573ffeb8d9645
2020-11-11 15:04:39 +08:00
Sugar Zhang 1ac424cf03 rockchip: rv1126: Increase otp tRWH timing for stable read
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d
2020-11-11 10:17:09 +08:00
Jianqun Xu 5a82dae5f5 rk3568_defconfig: enable rockchip-io-domain driver
Change-Id: I5803b2fbd79ada441ff48c22f1a1511279bb014b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Jianqun Xu fcff2851be power: io-domain: rockchip: fix rk3568 grf offset
Change-Id: I1045ce0d942ea57e325bdf3b8aa4bc8c9023d9e8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Jianqun Xu 836c6892fa pinctrl: rockchip: fix RK3568 for pull set
Change-Id: I9fa739d65caf54067f8c61142ced44f9ad9d7313
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Joseph Chen e6251c431c configs: rk3568: enable spl D-Cache
Change-Id: I2d07f04e33fd1563e19b17ec6f3904149875be7b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2020-11-10 16:13:58 +08:00