We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 061daa0b61f0fbeb214c566f3adb23da05545320)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I28e5722504bfd0428cd119b2aaae60682a720648
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 20031567e12bb312bff95b70767f6275e20f0346)
Conflicts:
common/image-fit.c
lib/rsa/rsa-sign.c
lib/rsa/rsa-verify.c
Change-Id: Ie522fec1ea69e6b86ebde0f7dad91a45670da66b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Previous implementation of the rsa signature was using
the openssl API EVP_Sign*, but the new openssl API
EVP_DigestSign* is more flexible. So we move to this
new API.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 3b5d6979fcb80ffae3b140be6edc04cbde1a0b72)
Conflicts:
lib/rsa/rsa-sign.c
Change-Id: I6016a13904024a63d6fb8110cef37e57a164eed9
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B
Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
There are too many product assortments of defconfig
and ini file on some platform, so we have to add
options to bind ini file with defconfig.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4876489d2af99b43ba3fa214a16b2d65919ed138
Short introduction of all rockchip platform defconfig.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I44b0621741e1b7fa3243a15e7313546bbd368d21
fix timeout bug of crypto V2 computing large amounts of data all
at one time.
Change-Id: I6c4a3f8b0a40e95b0832244313d7e378e1e70615
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
In order to check this node by list_del_init().
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I723821d8b9fc6d899fbd5c0b830b240486a48c73
The io-domain/pmu-io-domain node always under grf/pmugrf, so get the
grf/pmugrf regmap base just from its parent device.
Change-Id: I9f7d950744b48c239a556b7fe685749cdd5f99f2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The rockchip_pin_ctrl struct is BSS data, only memset oncetime, but the
driver maybe probed several times, the nr_pins member of struct won't
to start from 0. that will cause pinctrl driver error.
Change-Id: I3d081da8bb91573126c6ee5af345ed73c85bb7af
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Fallback to maskrom download mode if rockusb command failed.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iccfa8745aeac800b1e048e0301147424cd2e9478
Naturally, otp is written by bytes and programed just one time.
Now the rollback space is written by bit and programed several times.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I964693c5067ffdedfc0990f038f6d013a49a41a8
Parts of esmt devices are the same MFR id, and it's
reasonable.
Change-Id: I245c66ebd734ebabe89d8a6792446b80b76dd0e3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Support F50L1G41LB
Change-Id: I094a093fd07b6b2f924a58cf45375e214df796ce
Signed-off-by: Carl <xjxia@grandstream.cn>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>