Commit Graph

86 Commits

Author SHA1 Message Date
Lin Jinhan a3341e9017 drivers: crypto: drop rng api from crypto driver
rng module is not belongs to crypto driver anymore.

Change-Id: I6d837397621267edb586034ff87b82fc33a30d5b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-30 09:02:02 +08:00
Lin Jinhan 00fa57d80d driver: crypto: mask CRYPTO_SYNC_LOCKSTEP_INT_ST flag
This flag maybe abnormal trigger.

Change-Id: Id398d1e8636c28b8cc42d950cafa5e2731a41b62
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
Lin Jinhan 7eea182341 crypto: rockchip: support rk3568 without hwrng in crypto
Change-Id: I557a05e0336fe6b80d903a48a2d088f165a4eeca
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-11-24 16:02:35 +08:00
Lin Jinhan c48f1acf4a crypto: rockchip: modify crypto hash cache support for crypto v1&v2
Change-Id: I6e0604bf02908269ab021714378b66ed712fdc06
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-10-30 09:24:49 +08:00
Lin Jinhan 864e581c22 crypto: rockchip: add ROCKCHIP_RSA and SPL_ROCKCHIP_RSA config
use ROCKCHIP_RSA to enable RSA in uboot.
use SPL_ROCKCHIP_RSA to enable RSA in spl.

Change-Id: I1c3ae3754e9dbdfe39c81b554387fe78451a9fa2
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-07-23 10:04:14 +08:00
Joseph Chen e0d8614639 dm: crypto: remove TPL crypto kconfig option
They are impossible to be used in TPL.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia42330ce3f6621020ae492675de320aa75f33da4
2020-07-21 16:14:48 +08:00
Lin Jinhan 086e8fa830 crypto: rockchip: crypto_v2: split the data into 32M chunks when update
fix timeout bug of crypto V2 computing large amounts of data all
at one time.

Change-Id: I6c4a3f8b0a40e95b0832244313d7e378e1e70615
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-07-08 17:27:34 +08:00
Joseph Chen 42c5849b56 Merge branch 'next-dev' into thunder-boot
Change-Id: I83b054613effee1a89bdcbffbc68ebf37abe7a2b
2020-04-02 09:02:11 +08:00
Lin Jinhan 341631cbfb crypto: rockchip: v2: pka: fix bug on set np
Change-Id: I2b3207dcb3ce138a8677796ae628d1f270fab621
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-04-01 17:31:06 +08:00
Lin Jinhan 6b5b88bc03 dm: crypto: add zero hash support
Change-Id: Ib0f74e9636a214918511715cdd4ef32ebe65463a
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-04-01 17:31:06 +08:00
Lin Jinhan 7c6bc8e3ac crypto: rockchip: v2: add rv1126 support
Change-Id: Ic7eab78341dd10bddd95489832ac967c1e473bcd
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-03-31 12:38:11 +08:00
Lin Jinhan 1606a214ea crypto: rockchip: v2: optimize rk_hash_update
if data address and data len is meet crypto v2
hardware requirements, data will be calculated
without cache.

Change-Id: Ifc5acc5b449c581dbf3ac5f20ad6b8d932954aa7
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-03-30 19:10:13 +08:00
Joseph Chen c14e46abc4 dm: crypto: add API for multi regions checksum
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id364b123a189987458b72adca28f4f4e75e90291
2020-03-24 21:00:10 +08:00
Joseph Chen 978c395756 crypto: rockchip: v1: add address print for aligned failed message
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9009f88646942caf950d9da949581d60273a2eb8
2019-12-17 15:05:18 +08:00
Joseph Chen fb5bc6bbf9 crypto: rockchip: v1: require update data length 4-byte aligned
Only the last update data length can be any length.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4ee6c596575306799f562433e83323d805b59d32
2019-12-10 08:39:33 +08:00
Lin Jinhan da2d9dd013 crypto: rockchip: v1: make input buffer CONFIG_SYS_CACHELINE_SIZE aligned
Avoid warning from flush_dcache(): "CACHE: Misaligned operation at range ..."

Change-Id: I8879a3a0dc324463dc5e042bace183a6a2d453a5
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-12-10 08:39:32 +08:00
Joseph Chen b5038b6202 crypto: rockchip: v1: update print message
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic65aa48277f13b9dbf416a4ca19019d27ad0b546
2019-12-10 08:39:32 +08:00
Lin Jinhan c0e47d038c crypto: rockchip: v2: rk1808 is not support SHA512
Change-Id: Ic910d5e87657c80d454c4d8b6dc575ece2867f3e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-12-10 08:39:32 +08:00
Joseph Chen 1d2a3f6ca3 dm: crypto: move head file to crypto.h
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iac0f2e5eec7d0370182f7b6a2c904b4542bbbc37
2019-12-10 08:39:32 +08:00
Lin Jinhan 434d6fd368 crypto: add crypto v2 TRNG support
Change-Id: I25d4e8115e3ab9060d3bc87db06de481e299d6ab
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-10-14 20:57:26 +08:00
Lin Jinhan 8132d8af90 crypto: crypto v2: add rk3308 support
current support: px30/rk1808/rk3308

Change-Id: Ic7ae717bcbc6340a50e23051b35dba695f6222bb
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-10-14 20:57:25 +08:00
Jason Zhu bf76714965 crypto: rockchip: support spl/tpl build
Change-Id: Ib100d7d46ea212257df5262a4fa42e485708e8fb
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-08-28 14:13:12 +08:00
Jason Zhu 638f562e2b dm: crypto: support spl/tpl build
Change-Id: I5af80d5de66edf7fc0c5e8449cd8b7ab9507c969
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-08-28 14:13:12 +08:00
Lin Jinhan e7846385ca crypto: add crypto v2 SHA512 support
Change-Id: Idee2ada3d5da6aef2a170509da2efa6b1f6e4a9d
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-08-05 17:46:03 +08:00
Jason Zhu fafc7e6361 crypto: add rk1808 compatible
Change-Id: Ia75829183f99f688d7b749b19755c401e54f9a1d
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-03 09:34:10 +08:00
Jason Zhu 3a72f5033d crypto: remove platform dependency configuration
Change-Id: I801509d19417a1f4e88e430220e624ab6d4757d1
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-02 17:55:40 +08:00
Lin Jinhan b353a43c9e crypto: add rockchip crypto v2 driver
Crypto v2 driver implements algorithm below.
Hash: MD5/SHA1/SHA256
RSA : RSA512/RSA1024/RSA2048/RSA3072/RSA4096
for the platforms: px30/rk3326.

Change-Id: Ia3b3233f3d17db1c98da60aa8dd1cd26aed7b260
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2019-06-06 14:59:32 +08:00
Joseph Chen f9ebf7a1de crypto: rockchip: v1: use BITS2WORD() for sha final
Adding error message for missing total data length when sha init.

Change-Id: Ibbd266a36ba1498ab4ab5c85ecbb68c548a89a86
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-28 20:31:28 +08:00
Joseph Chen a3d0083590 crypto: add rockchip crypto v1 driver
Crypto v1 driver implements algorithm MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048
for the platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.

Change-Id: Ib3e16c365dd130ad2d5ab9008f8db4252cbd2834
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-16 15:27:48 +08:00
Joseph Chen cc6ac5d64f dm: add crypto uclass and cmd support
Change-Id: I2241c90aca9695cd28bb9ca2a220d0e1af8ca932
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-05-16 15:27:48 +08:00
Jason Zhu 726087de6e crypto: support rockchip hardware crypto
Support: rsa & sha algorithm
Usage: Set CONFIG_RK_CRYPTO to enable rk crypto.

Change-Id: I2b6a920308fcdf46481bcf38fc6be532a02255bd
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-01-28 20:42:54 +08:00
Masahiro Yamada 0e00a84cde UPSTREAM: libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Change-Id: I6c0f7e50e8b571106627f25ddac008a62bd2994e
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-12-24 17:20:37 +08:00
Clemens Gruber 4c2cf973aa crypto/fsl: fix obj-yy in Makefile
When enabling CONFIG_CMD_BLOB and/or CONFIG_CMD_DEKBLOB, the build fails
with a linker error:
  ...
  LD      u-boot
arch/arm/mach-imx/built-in.o: In function `blob_encap_dek':
/home/clemens/dev/u-boot/arch/arm/mach-imx/cmd_dek.c:46: undefined
reference to `blob_dek'

This is due to an error in the Makefile, resulting in obj-yy/obj-yn/..
and fsl_blob.o is therefore not linked.

Fix it by splitting it up into two obj-y lines.

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-09-04 09:02:07 -04:00
Simon Glass 551c393446 Convert CONFIG_CMD_HASH to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 12:38:15 -04:00
Tom Rini 089df18bfe lib: move hash CONFIG options to Kconfig
Commit 94e3c8c4fd ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it.  Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool.  In many cases we can select
these because they are required to implement other drivers.  We also
correct how we include the various hashing algorithms in SPL.

This commit was generated as follows (after Kconfig additions):

[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL

Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.

Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 08:36:58 -04:00
Tom Rini 3c476d841d Merge git://git.denx.de/u-boot-fsl-qoriq 2017-04-18 11:36:06 -04:00
xypron.glpk@gmx.de d1710561b0 drivers/crypto/fsl: remove redundant logical contraint
'A || (!A && B)' is equivalent to 'A || B'.
Let's reduce the complexity of the statement in start_jr0().

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-18 10:29:25 -04:00
York Sun 4a3ab19322 armv8: ls2080a: Drop macro CONFIG_LS2080A
Use CONFIG_ARCH_LS2080A instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Ruchika Gupta 511fc86d0b arm: ls1046ardb: Add SD secure boot target
- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size
  as header is appended to u-boot image. So header will also be
  copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
  (128K) where 32K are reserved for use by boot ROM and 6K for the
  header.
- Reduce the size of CAAM driver for SPL Blobification functions
  and descriptors, that are not required at the time of SPL are
  disabled. Further error code conversion to strings is disabled
  for SPL build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
York Sun 90b80386ff crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig
Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:19 -05:00
York Sun 2c2e2c9e14 crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:17 -05:00
York Sun 4fd64746b0 powerpc: C29X: Move CONFIG_PPC_C29X to Kconfig option
Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
Robert P. J. Day fc0b5948e0 Various, accumulated typos collected from around the tree.
Fix various misspellings of:

 * deprecated
 * partition
 * preceding,preceded
 * preparation
 * its versus it's
 * export
 * existing
 * scenario
 * redundant
 * remaining
 * value
 * architecture

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-06 20:57:40 -04:00
Masahiro Yamada 5d97dff042 treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.

<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 22:25:27 -04:00
Masahiro Yamada 1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
Sumit Garg 7fe1d6a410 crypto/fsl: Update blob cmd to accept 64bit addresses
Update blob cmd to accept 64bit source, key modifier and destination
addresses. Also correct output result print format for fsl specific
implementation of blob cmd.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02 09:45:39 -07:00
Sumit Garg 7f0a0e4c58 DM: crypto/fsl: Enable rsa DM driver usage before relocation
Enable rsa signature verification in SPL framework before relocation for
verification of main u-boot.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:21 -07:00
Sumit Garg 8f01397ba7 powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.

Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
access to CPC configured as SRAM, configure PAMU.

Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-21 11:09:23 -07:00
Robert P. J. Day 62a3b7dd08 Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:

     * "compatble" -> "compatible"
     * "eanbeld" -> "enabled"
     * "envrionment" -> "environment"
     * "FTD" -> "FDT" (for "flattened device tree")
     * "ommitted" -> "omitted"
     * "overriden" -> "overridden"
     * "partiton" -> "partition"
     * "propogate" -> "propagate"
     * "resourse" -> "resource"
     * "rest in piece" -> "rest in peace"
     * "suport" -> "support"
     * "varible" -> "variable"

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-07-16 09:43:12 -04:00
Teddy Reed 51c14cd128 verified-boot: Minimal support for booting U-Boot proper from SPL
This allows a board to configure verified boot within the SPL using
a FIT or FIT with external data. It also allows the SPL to perform
signature verification without needing relocation.

The board configuration will need to add the following feature defines:
CONFIG_SPL_CRYPTO_SUPPORT
CONFIG_SPL_HASH_SUPPORT
CONFIG_SPL_SHA256

In this example, SHA256 is the only selected hashing algorithm.

And the following booleans:
CONFIG_SPL=y
CONFIG_SPL_DM=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_FIT_SIGNATURE=y

Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Sumit Garg <sumit.garg@nxp.com>
2016-06-12 13:14:58 -04:00