Before the patch, we get gpio index(0,1,2..) depends on gpio
fdt node name, such as: gpio0@..., gpio1@..., etc.
But from RK3568, we add gpio alias to indicate gpio index
information and index is removed from gpio node name, ie:
gpio@fdd60000, gpio@fe740000, etc.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I56e45941f9572fbc6a5a5916896e12f6eff9dcf3
RK3568 only support cpu interface system registers access.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie89380e49ee61afe57560dcc4eba6233f2aca3f2
When a CPU enters a low power state, the registers ICC_IGRPEN1_EL1 is lost.
It need to re-initialise.
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I62d9eed2b29190134d95ebd153f21aa764c4ab3b
Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff
- disable virq chip by default;
- fix bank->use_count little than 0;
Change-Id: I69aa07cc2924dab40eea6524588869361ad8cf66
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
It handles the issue when the bootflow without Miniloader,
i.e. Maskrom => Trust(optional) => U-Boot.
Change-Id: I445225d5cce9abd2117ef468f15774e3fa57e16d
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
This patch support the device to add its interrupt controller as "irq chip"
into generic interrupt framework, the other driver can request its child
interrupt like a real hardware irq.
Example for PMIC:
GIC-\
|- ...
|- GPIO-\
|- ...
|- PMIC-\
|_ virq_0
|_ virq_1
|_ virq_2
|...
|_ virq_n
Change-Id: I17716f3db494a85fc22b23ff18042771a6116da8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Enable gpio irq only when child pin irq is request.
Change-Id: I429839c7dcdcb90cfe58738eeb36c7445fb0152b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
- using IRQ_X() to print message;
- update some comment;
- rename some function;
- add more strict irq sanity;
Change-Id: If5432818d4bc12fc1aa0b8aca6898bbf79dfa9fb
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
IRQ_STACK_START_IN is default 0x0badc0de which is a invalid address,
this patch makes all exceptions routine work normally.
Change-Id: I3f4d75b90d840f7ea1cb7a2e1cbc7ad452aef15b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
We install a timer interrupt and dump pt_regs when
the timeout event trigger. This help us to know cpu
state when system hang.
Change-Id: I91aa2322036ae83ac8b9cd299bef9b521995d85b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
In the function gpio_get_intr_type, 'type' may be
used uninitialized if not add default process.
Change-Id: I917fecc2ed06cc844c30c93508084f32608edf6f
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
U-Boot will support cpu suspend/resume, cpu and logic may
lose power, this patch guarantees gic works normally.
Change-Id: I8ebee881fa27fea075502f962f9faabaa8264f67
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
gic irq handler only need private data, while gpio irq(parent bank)
handler needs private data and irq number for getting gpio bank and
pin information. So we need deliver both of them to the irq handler.
This patch fixes the legacy code issue.
Change-Id: I1917b588a867e807cbd15e2e4101ae259cf4a40f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
This patch add support for IRQ interrupt, FIQ not included.
It will be enabled when you select CONFIG_GICV2 or CONFIG_GICV3.
The framework support gic interrupt and gpio interrupt, relative APIs
are provided in: ./include/irq-platform.h
If you'd like to add a new platform support into interrupt framework,
please follow the steps:
1. add relative definitions in the file like other platforms:
./include/irq-platform.h
2. add GICD, GICC and GICR(for GICV3) base address definitions in the
rkxxx-common.h, they are needed in: arch/arm/cpu/armv8/start.S;
3. enable CONFIG_GICV2 or CONFIG_GICV3.
Notice:
1. the framework is initialize in function 'interrupt_init()' of
_sequence_r[]. So you should not request irqs too early.
2. IRQ stack size is configured by CONFIG_IRQ_STACK_SIZE, the default
value is 8KB when CONFIG_IRQ_STACK_SIZE is absent.
Change-Id: I3d9e29873c9d64cd28aabd13a61111438c5902b0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Joseph Chen
shengfei Xu
Jason Zhu