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4 Commits

Author SHA1 Message Date
David Wu 63a2faadfe net: dwc_eth_qos: Fix compile error for gpio 
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ife092cc2aca2c359fc465058e44ca645afbc8114
 2020-06-02 17:49:16 +08:00
David Wu 65dd574d8d net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip 
The Rockchip CSR clock range is from 100M to 150M, add
EQOS_MAC_MDIO_ADDRESS_CR_100_150.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ib60f306cb9e8abec9557e92a6d04d76a7071b9ea
 2020-06-02 16:10:47 +08:00
David Wu fc99c7ab03 net: dwc_eth_qos: Add eqos_rockchip_ops 
The eqos_rockchip_ops is simillar to eqos_stm32_ops, and
export the eqos_rockchip_ops to use.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I214b0b2fbe04a139de911435c4abf224264f5495
 2020-06-02 16:10:47 +08:00
David Wu 23ca6f743c net: dwc_eth_qos: Export common struct and interface at head file 
Open structure data and interface, so that Soc using dw_eth_qos
controller can reference.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ic845d330465c1bb8f7868fb188e5bf30c865b9b5
 2020-06-02 16:10:47 +08:00