Commit Graph

51026 Commits

Author SHA1 Message Date
Joseph Chen 8db677370c irq: irq-gpio-switch: add gpio alias name support
Before the patch, we get gpio index(0,1,2..) depends on gpio
fdt node name, such as: gpio0@..., gpio1@..., etc.

But from RK3568, we add gpio alias to indicate gpio index
information and index is removed from gpio node name, ie:
gpio@fdd60000, gpio@fe740000, etc.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I56e45941f9572fbc6a5a5916896e12f6eff9dcf3
2020-11-14 15:32:03 +08:00
Joseph Chen 9d23fbe3b7 spl: fit: load kernel dtb if need
kernel FDT is for U-Boot if there is not valid one from images,
ie: resource.img, boot.img or recovery.img. It is put right
after U-Boot FDT.

This is used for U-disk bing up.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I348b6ea5736f46c091284c501e7e0f9c64cd2f78
2020-11-14 15:32:03 +08:00
Joseph Chen a14492767c rockchip: make_fit_atf/optee.sh: add "kernel-fdt" node
kernel FDT is for U-Boot if there is not valid one from images,
ie: resource.img, boot.img or recovery.img. It is put right
after U-Boot FDT.

This is used for U-disk bing up.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iab1ddbbf3978a6b2fc08316bb136c43c0d2eef60
2020-11-14 15:32:03 +08:00
Joseph Chen 20647277f1 rockchip: kernel-dtb: check mismatch of kernel dtb
Simply check cru node to verify if this kernel dtb
is belong to current platform.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8c0b2181a2ca3cada72a9e18788de0bfdc9ba3c5
2020-11-14 15:32:03 +08:00
Joseph Chen d6e082ceff common: board_f: print kern.dtb address
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8f593632676cad3758c37d5a027932bc1302f0d5
2020-11-14 15:32:03 +08:00
Joseph Chen cab35d601e make.sh: use "atf-1" to check uboot.img
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I49004f1dac8eaedd11c449ab7f6e6fba7c0605c4
2020-11-14 15:25:33 +08:00
Joseph Chen 7d70ffaead rockchip: make_fit_atf.sh: use "-" instead of "@"
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I02b6a5f376184ea50c0db8714d225a1cd0cb39e1
2020-11-14 15:25:33 +08:00
David Wu e4e3f4318d net: gmac_rockchip: Add rmii support for rv1126
Change-Id: I89401b89ff8fd3d9cca754d6f1c05dc76ef2cda6
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-11-14 15:23:48 +08:00
Weiwen Chen 9fb3fe4220 configs: rv1126: enable cmd mtd for spi nand erase/write/read
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie4eba0bba18d44bca12a80df0083d1bf018a74d2
2020-11-14 15:23:31 +08:00
William Wu 3b2dd5de37 usb: dwc3: do not use 3.0 clock when operating in 2.0 mode
In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.

Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-11-14 12:05:13 +08:00
Jason Zhu cce972667a rockchip: rk3568: set the emmc drive strength to level 2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic515e9aa81448ac1abcf378e9f4cd9b08247bdde
2020-11-14 11:55:39 +08:00
Jason Zhu 60238d95dc mmc: sdhci: rockchip: change tapnum to 16
According to the test hadware testing.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I2750a7de9f79807256800868ae53d3fe4a23b2f1
2020-11-14 11:55:39 +08:00
Joseph Chen 258d2dcb26 env: Kconfig: add entry for ENV offset and size
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I8609519d0dc5519b57201406d1f7ae4948b0e9b3
2020-11-13 09:22:12 +00:00
Joseph Chen 2c655b73ba lib: sysmem: update help of "sysmem_search" command
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie747d258fa00301c488f5747cf729c242e4d6033
2020-11-12 13:12:09 +00:00
Jon Lin ca319403be configs: rk3568: Enable spinor
Change-Id: I8c6ae405ad70a13e2ee8624c99db588d71fc33ed
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-12 20:12:27 +08:00
Yifeng Zhao 007849d805 drivers: rockusb: add new idb feature for rk3568
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iee5ed01bb336a5b5994381fc8e734da3b87329fe
2020-11-12 20:12:17 +08:00
Elaine Zhang 9f408268dc rockchip: rk3568: support rockchip_get_cru for rk3568
Change-Id: I2029c26da80b5ed5cd18e154751688fd29862813
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-12 10:32:25 +08:00
Yifeng Zhao 8d74d6b7d3 drivers: mmc: rockchip: rk3568: config rx clock no inverter for hs200
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I426a5c3ee0899fbd54711e13550310f77f8abd3e
2020-11-11 19:48:46 +08:00
Jason Zhu b48cb5c290 rockchip: dts: rk3568: set emmc bus width to 8
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ifdbe8ed76caa746070c3c5cf166573ffeb8d9645
2020-11-11 15:04:39 +08:00
Sugar Zhang 1ac424cf03 rockchip: rv1126: Increase otp tRWH timing for stable read
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d
2020-11-11 10:17:09 +08:00
Jianqun Xu 5a82dae5f5 rk3568_defconfig: enable rockchip-io-domain driver
Change-Id: I5803b2fbd79ada441ff48c22f1a1511279bb014b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Jianqun Xu fcff2851be power: io-domain: rockchip: fix rk3568 grf offset
Change-Id: I1045ce0d942ea57e325bdf3b8aa4bc8c9023d9e8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Jianqun Xu 836c6892fa pinctrl: rockchip: fix RK3568 for pull set
Change-Id: I9fa739d65caf54067f8c61142ced44f9ad9d7313
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-11-10 17:15:52 +08:00
Joseph Chen e6251c431c configs: rk3568: enable spl D-Cache
Change-Id: I2d07f04e33fd1563e19b17ec6f3904149875be7b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2020-11-10 16:13:58 +08:00
Jon Lin 88bba81c6c rockchip: dts: rk3568: Enable spi flash
Change-Id: I36eb3471eb82e78db1bdd7114ce2bc30166e0e68
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-10 14:58:34 +08:00
Jon Lin 70798a3509 configs: rk3568: Enable spi flash and raw nand
Change-Id: Id69e4bdc3685a40826f2f13cb90cccc9cd960808
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-10 14:58:34 +08:00
Jon Lin 69b42caea5 rockchip: rk3568: Support nand devices
Change-Id: If8433d63e7f101f2f1837b6f613705b0ba18f72a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-10 14:58:34 +08:00
Elaine Zhang 801ca42bf6 clk: rockchip: rk3568: fix up the vpll register address
Fix up the error description of TRM.

Change-Id: Ie95482efea4e78505d361b5377ff4a23826d69e3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-10 10:20:20 +08:00
Joseph Chen 125d49da41 scritps: fit-repack: clean coding style
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic6284cd161eba58d1fad3f33f56eababbacca487
2020-11-09 21:23:41 +08:00
Joseph Chen 6b7fba5894 make.sh: check pyelftools for 64-bit uboot.img
arch/arm/mach-rockchip/decode_bl31.py depends on pyelftools.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic7a0524df5b58472b5cb73e8b0c83a997426eb1b
2020-11-09 19:49:18 +08:00
Ren Jianing e475bd5dfd phy: rockchip-inno-usb2: add usb2 phy support for rk3568
RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the
OTG port of PHY0 support OTG mode with charging detection
function, they are similar to previous Rockchip SoCs.

However, there are three different designs for RK3568 USB 2.0 PHY.
1. RK3568 uses independent USB GRF module for each USB 2.0 PHY.
2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB.
3. The two ports of USB 2.0 PHY share one interrupt.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ia33d3de222a6c7f263290f4098d0a5e557a9d568
2020-11-09 19:39:27 +08:00
Joseph Chen 3aaa96e8af rockchip: boot-mode: reinitialize static variable "boot_mode"
Special handle:
   Once the BCB offset changes, reinitialize "boot_mode".

Background:
   1. there are two Android BCB at the 0x00 and 0x20 offset in
      misc.img to compatible legacy(0x20) SDK.
   2. android_bcb_msg_sector_offset() is for android image:
      return 0x20 if image version < 10, otherwise 0x00.
   3. If not android image, BCB at 0x20 is the valid one.

U-Boot can support booting both FIT & Android image, if FIT
boot flow enters here early than Android, the "boot_mode" is
set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
After that, this function always return static variable "boot_mode"
as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0ed05ba1b18447a58d3faff37ac50ecc79fab374
2020-11-09 17:20:54 +08:00
Joseph Chen bec557fbbd configs: rk3568: enable avb image support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib2a2d9550007d94c553807017cee6f26e8bd0ab6
2020-11-09 17:20:54 +08:00
Joseph Chen 253ea6c67d common: android: independent on optee client
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5c124c7bfcdfd3c2972a5310046b633324e3bdf0
2020-11-09 17:20:46 +08:00
Joseph Chen ae205b953a lib: avb: independent on optee client
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I1bab69baf97b5174024db25278cf30efafd3e34e
2020-11-09 17:20:45 +08:00
Yifeng Zhao 80b8cdeb0b configs: rk3568: enable SDHCI SDMA
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I1fa29a7d0349aa9ed0bb9a8f934061d1da093c52
2020-11-09 16:10:02 +08:00
Yifeng Zhao 311b34e2f1 dts: enable hs200 mode for rk3568
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ia6108713cf09372b35bbc0ae35ca179358a83362
2020-11-09 16:10:02 +08:00
Yifeng Zhao 28b3b131e9 drivers: mmc: rockchip: fix phy dll config for hs200
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ie72f2414eca2856102e0a477668ec2729396cd25
2020-11-09 16:10:02 +08:00
Joseph Chen 2cb6220e86 Revert "configs: rk3568: disable DTBO"
This reverts commit 08f4453d59.

Change-Id: I1d37553bc3a90e4f08506a02428cb2ea750c7498
2020-11-09 14:52:06 +08:00
Joseph Chen 713cdac3a7 common: android: allow failed to overly dtbo
Restore main fdt if it's destroyed by fdt_overlay_apply()
when overlay failed.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id26085f2df89d208caadeb3c4ce33f21f896ee22
2020-11-09 14:51:56 +08:00
Weiwen Chen 2217694352 configs: rv1126: ethernet: enable random address
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I8a43f2479e339149f936daaf53f8730c31f2aa7b
2020-11-09 09:14:32 +08:00
Joseph Chen 08f4453d59 configs: rk3568: disable DTBO
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I194a2eadb16bffd75c8ab8b3c390bfb37873bec3
2020-11-08 21:22:37 +08:00
Joseph Chen d982a3cdf9 rockchip: chip info: add rk3568 support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I08e347709d870c5c65265a31ccfb1ccd370ef606
2020-11-08 21:22:37 +08:00
Joseph Chen ee4d695f5e rockchip: make_fit_atf/optee: add "arch" property for fdt node
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I129f2cc7a395d48c83e5ab01fb12b73eda614ed3
2020-11-08 20:40:58 +08:00
Elaine Zhang d41e2874c4 clk: rockchip: rk3568: emmc support 52MHz
Change-Id: I54841ec5c7a5030bbbf9fa5b6b6fdc742250a127
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-08 20:28:41 +08:00
Elaine Zhang d01aebd267 clk: rockchip: rk3568: emmc support 400KHz
Change-Id: I1b16a4ad2e67749e63eb1506c6c1462db3e6abbd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-11-08 19:15:43 +08:00
Joseph Chen 81e837fa84 rockchip: spl: support pre-loader serial
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I082fae758a1e9dfb2b4c8b241b24bee396704922
2020-11-07 20:49:49 +08:00
Joseph Chen b3561c89c7 scritps: spl.sh: support new idb pack
Change-Id: I86d82c7358810aa7a7ee21133bdacf58716a5802
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2020-11-06 18:21:26 +08:00
Jon Lin a80fd39692 drivers: rkflash: Support new devices
MT29F2G1ABA, F50L2G41XA, W25Q128JVSIM, ZB25LQ128, FM25Q64-SOB-T-G

Change-Id: Idf09d96161130d4741e046acd9d520683c37213e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-06 14:09:54 +08:00
Yifeng Zhao 1b01cf5590 cmd: rockusb: reboot to boot ROM rockusb while using slc nand
The rockusb in u-boot could not support BLK_MTD_NAND and
BLK_MTD_SPI_NAND, need reboot to boot ROM.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I16d9f25d84322c9752e2e62451cd7b8c0aa16f02
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-11-05 17:01:02 +08:00