Commit Graph

51350 Commits

Author SHA1 Message Date
Jason Zhu 926664c9a0 lib: avb: reduce write rollback index operations
The optee is used to storage security data in U-Boot, and a file
which occupy 16KB is created when write a rollback index. But the
security space is only 512KB, the sapce is not enough when write
too many items.

And here we write rollback index 32 times, but the avb only use
rollback_index_location 0 to verify the rollback index with vbmeta.
So just get the rollback_index_location 0 in this process.

Test:
	fastboot getvar at-vboot-state

Error log:
	TEEC: reference out of data: -1
	TEEC: Not enough space available in secure storage!

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id69b852553a4ef9111dabe6f23e25038b0928bb3
2021-02-05 10:34:15 +08:00
Yifeng Zhao 72f40a61fa configs: rk3568: add usbplug config
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib341adf59f8566b54dbe27ecd7f949526bdf1264
2021-02-04 20:34:20 +08:00
Yifeng Zhao 5f73fdb14a rockchip: rk3568: support usbplug
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82
2021-02-04 20:34:20 +08:00
Yifeng Zhao 42b8fbc43f configs: add dfu configs for rk3568
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I3b4a126cf42d2c5efc604fc87ef26bb65f8ad6c4
2021-02-04 17:27:59 +08:00
Yifeng Zhao 8292f3589a configs: add dfu part info for rk3568
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib275162d137bec5e2550bf9c21455acf7bffc762
2021-02-04 17:27:59 +08:00
Yifeng Zhao 01abb59cac configs: add dfu configs for rv1126
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If4b314c4fc01f559e581503e0e7740126c3957ee
2021-02-04 17:27:59 +08:00
Yifeng Zhao 6984d2db2b configs: add dfu part info for rv1126
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If05ba8e00865d8950fb0f042fb07ff1e197eb88d
2021-02-04 17:27:59 +08:00
Yifeng Zhao da041cba1f arch: rockchip: add set dfu alt info api
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Idc6bd66c5b85a2bb100da3f270dd86b48dec8886
2021-02-04 17:27:41 +08:00
Yifeng Zhao 0bcaecc8ee drivers: dfu: add DFU to read and write to MTD base storage
Add DFU to read and write to MTD base storage.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I84cb160b182c31d7f84ed700896a4970845a3ca8
2021-02-04 17:24:07 +08:00
Yifeng Zhao ca42250799 drivers: usb: add usb pid for dfu
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id823187c0b74fe99c4fdff7fdb85f6d995ed9d28
2021-02-04 17:19:48 +08:00
Jason Zhu 9c5e2f1dbb disk: efi: correct the partition_entry_lba location
Set partition_entry_lba to 0x2 but not 0x22, otherwise it will
overlay write the rockchip's idb data in the location 32KB.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ic02859fb135ece6d609320a9df030f041af93a8e
2021-02-04 17:17:22 +08:00
Joseph Chen f703e20ccc configs: add rk3568-aarch32.config
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If3fb2c2febae8dc3a810f6748283d5527e248439
2021-02-04 15:06:29 +08:00
Joseph Chen f345af8b36 rockchip: rk3568: add AArch32 build support
SPL and TPL is still in AArch64 mode.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4768903d1dbdd06359eb196607b67fb128dea644
2021-02-04 15:05:57 +08:00
Joseph Chen 89031de132 Kconfig: Add CONFIG_FIT dependent for fit image generation
It's possible that we don't need SPL if we set CONFIG_ARM64_BOOT_AARCH32=y,
but uboot.img with FIT format is still required to be generated.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5330f58f9ca5a18a119bdcbfd4e9e716a69b1131
2021-02-04 15:05:57 +08:00
Joseph Chen 3ae4136e01 rockchip: rk3568: enable hardware rand library
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib537ad840d81fe152969166d6a37c4ddb64f1de7
2021-02-03 17:47:51 +08:00
Joseph Chen 3f0522ce8f rng: rockchip: add hardware rand library
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id22c5725158d86cc8a2ff80fdf09b0146d04be41
2021-02-03 17:47:51 +08:00
Joseph Chen 6126937122 net: Kconfig: imply LIB_RAND for NET_RANDOM_ETHADDR
Allow disabled in defconfig.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic7794bb9c1619e30f07b008aca60addcc8ef22fd
2021-02-03 17:47:51 +08:00
Joseph Chen a225402cf7 rockchip: board.c: support reboot stess test
It's a way to test system stability before kernel stages.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I6679fbbbaa7233750b409b6b832849d8dbd36893
2021-02-03 09:52:53 +08:00
Joseph Chen 4b1cd58cd0 scripts: fit: support sign recovery.img
Add args:
	--recovery_img
	--rollback-index-recovery
	--version-recovery

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iabd9a78155f1d6e10b9539bb9fee6d17153b8074
2021-02-02 17:06:43 +08:00
Jason Zhu 6221c090c7 dm: mmc: add more conditions to judge whether print the info
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I94f60c9102c8708d7fa84e729762bfe2956d4fd5
2021-02-01 10:21:45 +08:00
Jon Lin cc7b616de8 mtd: spinand: Enable FM25S02A QE bits
Change-Id: I247212779443f0166a633968203824e6552d669e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-02-01 10:21:30 +08:00
Lin Jinhan f54f4b43d9 rockchip: dts: rv1126: modify rng & crypto node
The RNG driver is separate from the Crypto driver.

Change-Id: I51b39e337106988d5444246a53e46c27644effb0
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-30 09:50:09 +08:00
Lin Jinhan 395a594bd5 configs: rv1126: enable rng module
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y

Change-Id: Ia0ad252c4886fed33ffca681df926d6ed4e6bc73
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-30 09:50:09 +08:00
David Wu 548715c7d5 UPSTREAM: net: eth-uclass: Change uclass driver name to ethernet
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.

(cherry picked from commit 1231184caacad32c180d7e2338a645f7dfe9571a)
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Change-Id: I2ebbf20ae2a127456f92dc79461610b7b339c8f3
Signed-off-by: David Wu <david.wu@rock-chips.com>
2021-01-30 09:48:34 +08:00
Lin Jinhan a3341e9017 drivers: crypto: drop rng api from crypto driver
rng module is not belongs to crypto driver anymore.

Change-Id: I6d837397621267edb586034ff87b82fc33a30d5b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-30 09:02:02 +08:00
Lin Jinhan b6b83d2acb cmd: crypto: drop rng test from crypto test
rng module is not belongs to crypto driver anymore.

Change-Id: I0f2dd50e93666ba6c8a9a43fab786beb1eeb93a8
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-30 09:02:02 +08:00
Patrick Delaunay dd239d3008 UPSTREAM: arm: armv7: solve issue for timer_rate_hz in arch timer
The current value timer_rate_hz causes a problem with function
timer_get_us() from lib time and then an issue with
readx_poll_timeout() function.

With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
the weak functions in lib timer can be used:
- get_timer()
- __udelay()
So the specific function in this file are removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
(cherry picked from commit 77aace579a9a84c74e99d2e86ecc08b1d9ca402b)
Change-Id: Id289de433e49d396a95e3a72acf210be3a2d910b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2021-01-29 18:52:41 +08:00
Lin Jinhan c39f2cf7f6 configs: rk3568: enable rng driver
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y

Change-Id: I3d937db599874ecf07f96f4d7ec94956972b895f
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-29 17:51:08 +08:00
Lin Jinhan 529dfdedda rockchip: dts: rk3568: add rng node and enable
Change-Id: Ie58d30776facf7f2bd6060fad06c4cbb53727e68
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-29 17:50:52 +08:00
Heinrich Schuchardt 025272a2d2 UPSTREAM: cmd: add rng command
For the RNG uclass we currently only have a test working on the sandbox.

Provide a command to test the hardware random number generator on
non-sandbox systems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
(cherry picked from commit 4f24ac08afccd5f51f0b4c7023fc8cf45efe8163)

Change-Id: Icb2a9359417a8168a38e1fc009960e8c6df924e4
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-29 17:50:52 +08:00
Lin Jinhan 3ebc872de9 UPSTREAM: rockchip: rng: Add a driver for random number generator(rng) device
Add a driver for the rng device found on rockchip platforms.
Support rng module of crypto v1 and crypto v2.

Change-Id: I5be779aa08452977965d032e366f4e36c930b12e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
(cherry picked from commit b072d00c225e5b8147ed7444ebeae4ddd336870b)
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-29 17:50:52 +08:00
Sughosh Ganu 28507ac336 UPSTREAM: dm: rng: Add random number generator(rng) uclass
Add a uclass for reading a random number seed from a random number
generator device.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit a2487684003b0bc380955e1a38cdd71da3ca4366)

Change-Id: Ife2287132db695181d663653f2ceaab0e343b41f
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2021-01-29 17:50:52 +08:00
William Wu d0aa80fb69 configs: rv1126: enable usb dwc3 host
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I8296e122285d3e6b3208607ad5a91fc12e8e074a
2021-01-29 14:57:09 +08:00
William Wu 631619a42f usb: dwc3-generic: support host mode if dr_mode is otg
The Rockchip DWC3 controller only support DRD mode (Dual Role
Device), but not support OTG mode. So if the dr_mode in DTS is
configured to OTG, then we force it to Host mode. This patch
does not affect the device function of OTG, such as rockusb.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I806623aa9b0bb8b595417755db7d9c6b6c4f38f1
2021-01-29 14:57:09 +08:00
Joseph Chen 3a711d9c62 make.sh: add host tool check for fit image
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I16bb64c3d0cb9be5d3c2dc55b61400dfb0bb23be
2021-01-29 09:44:50 +08:00
William Wu b23020efaf rockchip: rk3568: set usb2 phy0 and phy1 in suspend mode
This patch set the USB 2.0 PHY0 port0 and PHY1 port0 and
port1 in suspend mode to save power. And set the USB 2.0
PHY0 port0 for OTG interface still in normal mode.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I684e3bf8ce7934402e745ea7cfe110b987f5d9db
2021-01-28 15:04:41 +08:00
Wenping Zhang 074c7ac45f video/rk_eink: Don't read image from emmc to ddr if it's already loaded.
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: I02b141e5adb8391bf85ce77c6a7e280f645c96d5
2021-01-28 09:33:56 +08:00
Joseph Chen b978e52ca5 power: pmic: rk8xx: inactive pmic_sleep by default
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia5729341c5a94d0109a8a28e48ad8eb79b80962e
2021-01-27 17:11:30 +08:00
Joseph Chen 06b61291ba power: charge animation: add pmic suspend/resume
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia1b6d232b0a9c0d0ce2e8ee47ae84aaa6d40bfac
2021-01-27 17:11:30 +08:00
Joseph Chen 40db74046c power: pmic: rk8xx: implement suspend/resume callback
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I46b13886fcb3e7733155cd6f5fce15473c439da3
2021-01-27 17:11:30 +08:00
Joseph Chen 2a7051be6c dm: pmic: add suspend/resume callback
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Iaa3b0b7f7b3a0563370baace876e095deb64c28f
2021-01-27 17:11:30 +08:00
Joseph Chen e632c0509c configs: add rk3566-eink.config
- Build command:
	./make.sh rk3566-eink

- Update command for rk3566-eink.config:
	./scripts/sync-fragment.sh configs/rk3566-eink.config

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5253b5bdc8dda950dcc3a310e058df9045ddb751
2021-01-27 11:30:51 +08:00
Joseph Chen c995c47b7d configs: rk3568: remove Eink support
They will be added into rk3566-eink.config.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I0538b2af2bfa73190118df645143a3412e8a2ffe
2021-01-27 11:23:15 +08:00
Joseph Chen 374d259683 scripts: fit.sh: add more comments
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia283f3abad0afe683db073a8fc1fc9220f796e09
2021-01-22 15:06:53 +08:00
Jason Zhu 327b5d5723 dm: mmc: print the cmd index when sending cmd error occur
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I08aab678c5e539000fadccf4a8ad9e97e3693894
2021-01-21 18:12:47 +08:00
Weiwen Chen a2a2f053f6 configs: rv1126-spi-nor-tiny: spl enable gpt
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I372ecc4eac94bd7d9f699d674b4e5ee81cb1ccf0
2021-01-19 18:06:05 +08:00
Joseph Chen e42c205803 configs: rk3568: enable SPL secure otp
Fix compile error if enable CONFIG_SPL_FIT_SIGNATURE:

  LD      spl/u-boot-spl
lib/built-in.o: In function `rsa_burn_key_hash':
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:591: undefined reference to `misc_otp_get_device'
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:595: undefined reference to `misc_otp_read'
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:661: undefined reference to `misc_otp_read'
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:673: undefined reference to `misc_otp_write'
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:678: undefined reference to `misc_otp_read'
/home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:688: undefined reference to `misc_otp_write'
scripts/Makefile.spl:357: recipe for target 'spl/u-boot-spl' failed

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I48c6a2349bc10451f7c2c1f99f8b522e1244fad6
2021-01-19 17:17:30 +08:00
Jason Zhu 34d21c9ad8 UPSTREAM: mmc: dw_mmc: Calculate timeout from transfer length
The current 4-minute data transfer timeout is misleading and broken.
Instead of such a long wait, calculate the timeout duration based on
the length of the data transfer. The current formula is the transfer
length in bits, divided by a multiplication of bus frequency in Hz,
bus width, DDR mode and converted the mSec. The value is bounded from
the bottom to 10000 mSec.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I168b6ceba917d3e621559a92a63fac78abca6bff
(cherry picked from commit 4e16f0a67d80b4ce11995b870b5d9c8d11266d0d)
2021-01-19 16:57:34 +08:00
Jon Lin f7a0277a1d rockchip: rk3568: Enable FSPI secure
Change-Id: Id46debc74bfac7060244079582b06b35817b51cd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-01-19 15:54:36 +08:00
Jianqun Xu 7862d7bff3 UPSTREAM: core: uclass: fix to u32 for phandle of fdt
The function has a little fix during upstream review, do fix to sync
with upstream.

Change-Id: I9e1c43a660b2f83395d1639aa962988ca04494e5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-01-19 10:01:24 +08:00