Commit Graph

49196 Commits

Author SHA1 Message Date
Tuomas Tynkkynen 99c184906c UPSTREAM: spi: Migrate CONFIG_SH_SPI to Kconfig
Change-Id: I66c533e5c556c26b771037bc7eee5ceff01f5cb9
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 95d3877a5818cc3f149a9d443637ff145bbaaabb)
2019-07-23 17:15:31 +08:00
Heinrich Schuchardt 70716f3196 UPSTREAM: atcspi200: avoid possible NULL dereference
Check if ns before and not after dereferencing it.

Indicated by cppcheck.

Change-Id: Ic9a2491051754fef64ce7ad4a9a5377fc3aad6db
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 923837e159c5886be38c7a83a2d6bc489b35c1f4)
2019-07-23 17:15:31 +08:00
Eugeniy Paltsev ccb5fa0a6b UPSTREAM: DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.

Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.

Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)

Reviewed-by: Marek Vasut <marex@denx.de>
Change-Id: Iee14939326b5512a7704ccbcfd9795d1a1f6aa3b
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 58c125b9e2b232ce73ed7b24ba7b1ca5ff41c5bd)
2019-07-23 17:15:31 +08:00
Vignesh R 613aa4d50e UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de.

Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2019-07-23 17:15:31 +08:00
Goldschmidt Simon 06357de766 UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
This reverts commit b63b46313e.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Change-Id: If32c692ac37cf2ee25254b7ecc49bc09096bf5d0
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 948ad4f07598a729a0de523ed3d779115b2fa2f2)
2019-07-23 17:15:31 +08:00
Jason Rush 6b7eb4157f UPSTREAM: spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Change-Id: Ic221ac76abf1a32a027b9650bc6f27667209c77c
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 15a70a5da33229de884f60684a562ea60fe505b2)
2019-07-23 17:15:31 +08:00
Chris Packham ab86434d69 UPSTREAM: spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz.  However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.

Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.

Change-Id: Iee0b8cb304816d74c6442132be4cc04e6cb8adbc
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit df16881cea50a787c37591bd2168c8ea656217bd)
2019-07-23 17:15:31 +08:00
Mario Six 8849a3be8a UPSTREAM: spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change-Id: I8916ae85b0339d29d7b50382182a263848e21a39
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 24fc1ec2ee71cd852e556f90bd352cc809ddeef9)
2019-07-23 17:15:31 +08:00
Mario Six e806bc1cf3 UPSTREAM: spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change-Id: I0836438bec6597bb99038997ae6a549d647f1666
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 184fa1c8da54d3c5305b3e1975e284e01de68bea)
2019-07-23 17:15:31 +08:00
Mario Six b91a110b4c UPSTREAM: spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.

But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.

Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change-Id: I2a5bd866fda6d65b908c1f71160da59ab5332a15
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit c5b88f29ba46997e1cae39153980cae475b87b82)
2019-07-23 17:15:31 +08:00
Mario Six 439ce24404 UPSTREAM: spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.

Change-Id: I4084bfeaba1e992f589f5190660bcbfb8627b0b3
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 547bcc3d18ddcc107b8aa7ca393830590c27978f)
2019-07-23 17:15:31 +08:00
Álvaro Fernández Rojas 4bb24893b6 UPSTREAM: dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Change-Id: Ib6d47452d3699df5eb799cc0289687331192f380
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 29cc4368ad4b8d67ae457681e9249e2008d6fee5)
2019-07-23 17:15:31 +08:00
Álvaro Fernández Rojas c2d012f94d UPSTREAM: dm: spi: add BCM63xx SPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Change-Id: I2a36ddc619bc5801fe6f9f9873a63d8e6d62534f
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 5ac07d2969e7f1ea2582f97ccacbe9ad9c9d62fc)
2019-07-23 17:12:17 +08:00
Adam Ford 2b9d6da418 UPSTREAM: Convert CONFIG_DAVINCI_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_DAVINCI_SPI

Signed-off-by: Adam Ford <aford173@gmail.com>
(cherry picked from commit 26410c1517bbb6d6f90de55b5fa65dac3c298bc7)
Change-Id: I7b2166d5ea20dcd0a0e79d6faa1c51fca4d6eef9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2019-07-23 17:12:17 +08:00
Peng Fan c3bb0077c7 UPSTREAM: spi: fsl_qspi: support i.MX6UL/6ULLL/7D
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.

The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.

Add the compatible entry for 6ul/7d.

Change-Id: I8aa660b610b39c24969560187b35d5e7a8a17f5d
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit afe8e1b03362f169b2f905d20e2b352aca9d522e)
2019-07-23 17:12:17 +08:00
Rick Chen ab1460f224 UPSTREAM: cosmetic: atcspi200: Rename function name as atcspi200
Integrate function and struct name from ae3xx to
atcspi200 will be more reasonable.

Change-Id: I932c2ed047541b6ad09344c0ceb80496ac575c64
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6720e4ae7a01afa93b99a8f62b0cc98fe01abc9b)
2019-07-23 17:12:08 +08:00
Rick Chen 6b239db430 UPSTREAM: spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.

Signed-off-by: Rick Chen <rick@andestech.com>
(cherry picked from commit 41bbb8b333a6977cd28d31c58a5a209001ce5056)
Change-Id: I78d0112ba78c09ba9cd2beace324b3af9b867d71
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2019-07-23 17:12:08 +08:00
Heinrich Schuchardt 204b4e6872 UPSTREAM: rockchip: spi: the symbol for Hertz is Hz
fix typo

Change-Id: If467ba2cb4d16a4844400e9046e851ab0b96a4de
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 11f12c17d72499292f6e219ebbf8062faedcc5bb)
2019-07-23 17:12:08 +08:00
Heinrich Schuchardt 5385433492 UPSTREAM: omap3: spi: the symbol for Hertz is Hz
fix typo

Change-Id: Ifee202f67e4a972854ed33745de3984b6ae9e2d1
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 042de609ed49cfc41afb13639850c7b01079a527)
2019-07-23 17:12:08 +08:00
Bin Meng a117f09b28 UPSTREAM: spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.

Change-Id: I2cef052b87320392449c39a8aa2330236539a2c3
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ab20107468de5bf6b9affa93b17f2284cc838b5b)
2019-07-23 17:12:01 +08:00
Adam Ford 2bac9e0206 UPSTREAM: spi: davinci_spi: Add da830-spi support for DM
The DM support is already in the driver, so add
da830-spi to the compatible list.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Change-Id: I1a9146dc21017f7f32e79608cfecb4129df93a14
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ab0ac272421c4b72c7a78db32ad709e23cab1eea)
2019-07-23 17:12:01 +08:00
Suresh Gupta a668abfcdb UPSTREAM: spi: fsl_qspi: Copy 16 byte aligned data in TX FIFO
In some of the QSPI controller version, there must be atleast
128bit data available in TX FIFO for any pop operation otherwise
error bit will be set. The code will not make any behavior change
for previous controller as the transfer data size in ipcr register
is still the same.

Patch is tested on LS1046A which do not require 16 bytes aligned and
LS1088A which require 16 bytes aligned data in TX FIFO

Change-Id: I87e05aa2d038997a6681d664605c0de9ca6d51bd
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Anupam Kumar <anupam.kumar_1@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 10509987285515b0a969c39ef7374fea3545851b)
2019-07-23 17:11:52 +08:00
Suresh Gupta f0d9665a88 UPSTREAM: spi: fsl_qspi: Add controller busy check before new spi operation
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit 1c631da459a82f4f82a063f5b4ff339ca5384d11)
Change-Id: I79b786b7e24294538cf014c86658838409c29e78
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2019-07-23 17:11:52 +08:00
Peng Fan abdcd79a4c UPSTREAM: spi: mxc_spi: support driver model
Add driver model support for mxc spi driver.
Most functions are restructured to be reused by DM and non-DM.
Tested on mx6slevk/mx6qsabresd board.

Change-Id: Idb04e59b28f570b161aa75216748ebda0ed6d9ac
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 994266bdff7903279b8e43ddbf220b04a4e1411f)
2019-07-23 17:11:52 +08:00
rick 24456af2b5 UPSTREAM: nds32: spi: Support spi dm driver.
Support spi driver and can detect MX25U1635E flash on AE3XX board.

Verification:

sf probe 0:0 50000000 0
spi_flash_std_probe(sf_Probr.c)
	spi_flash_probe_slave(sf_Probr.c)
	SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
	NDS32 # sf test 0x100000 0x1000
	SPI flash test:
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps
	Test passed
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps

Change-Id: I40c6ea1857c58cffca3a89d53bd3593ad87a0bbe
Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b)
2019-07-23 17:11:49 +08:00
Joseph Chen eae0a6b103 cmd: add command "android_print_hdr" support
This is useful for debug.

Change-Id: I6e56255d6e32e692031c6c3226d0dc041433dd48
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-22 19:24:57 +08:00
Joseph Chen acffe33271 lib: sysmem: add sysmem_alloc_by_name() interface
Change-Id: I9e2fd6d99fdc487396dd9619dc54567bcd2ba242
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-22 14:23:50 +08:00
Joseph Chen 996752e678 rockchip: memblk: update memblk attr
Add M_ATTR_IGNORE_INVISIBLE for kernel memblk on RK3308-AArch32 to
alloc kernel region within 0~1M address.

Add "ramoops" alias for share memblk to avoid sysmem check warning.

Add M_ATTR_KMEM_CAN_OVERLAP for some images.

Change-Id: I1d7ed93a19ea22e5c69f23d75a1c1faf4e9f0104
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-22 14:23:50 +08:00
Joseph Chen 50226c8f95 lib: sysmem: optimise alloc policy
- Allow request region alloc within the first invisiable region reserved by
  bidram when request region has flags M_ATTR_IGNORE_INVISIBLE. This is a
  workaround for some firmware memory layout, eg: on RK3308-AArch32, the ATF
  region is 0~1M(same as RK3308-AArch64), but the kernel would like to alloc
  at 0x00058000.

- Always make kernel reserved-memory alloc successfully and check overlap
  with invisible and sysmem allocated regions in sysmem_overflow_check()
  before bootm. This makes alloc policy more easier.

Change-Id: I533c710a6e69bd930befda441b9ec64415e3f408
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-22 14:23:50 +08:00
Joseph Chen fc7ff0f015 lib: bidram: add bidram_reserved_is_overlap() interface
Check if the region is overlap with reserved regions.

Change-Id: Ifd9b6a4438dcf954b7e48930e31d0c6cd5d1274c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-22 14:23:49 +08:00
Algea Cao 351f3d38c3 configs: rk3368: Enable rk3368 hdmi
Change-Id: I402c3d104f72005b19d44908ac36a72662c482d8
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-07-19 15:39:52 +08:00
Algea Cao 19c2faf2ce drm/rockchip: dw-hdmi: Fix hdmi i2c scl configuration error
If ddc-i2c-scl-high-time-ns and ddc-i2c-scl-low-time-ns are not
set in dts, scl_high_ns and scl_low_ns will set to -1. Because of
these variables are unsigned int, misjudgment may occur when their
values are judged.

Change-Id: I8b94f7c2ab8bcb0d966182f220877f9268b7981b
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-07-19 15:39:52 +08:00
Algea Cao 84a1bd9cfb drm/rockchip: dw-hdmi: Support rk3368 hdmi
Change-Id: Iaef5abee75b6e754c4884009ee4dc799277b6253
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-07-19 15:39:52 +08:00
Joseph Chen fec5505a80 common: board_f: set GD_FLG_DISABLE_CONSOLE early before initcall
Set flags as early as possible to avoid putc() by CONFIG_DEBUG_UART.

Change-Id: Ifb986397e7d94a4ab1a47c065afba3c7845c2563
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:36:43 +08:00
Joseph Chen c7abde102f common: console: support disable console in & out
Set CONFIG_DISABLE_CONSOLE priority higher than CONFIG_DEBUG_UART,
otherwise there maybe some early message is printed by CONFIG_DEBUG_UART.

Change-Id: I235a49646b154e10e724e3d63e0ceecdd862c636
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:36:41 +08:00
Joseph Chen ab4c011acf rockchip: hotkey: disable hotkey when CONFIG_CONSOLE_DISABLE_CTRLC enabled
If we enable CONFIG_CONSOLE_DISABLE_CTRLC for AVB bootflow, we want to
disable hotkey too.

Change-Id: Idd542a1fa8b3b2a7d232373a767e91e49e90d9ae
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:31:38 +08:00
Joseph Chen 8dbcccd6d4 rockchip: atags: disable set atags if it is not available
We make the appoint that the other pre-loader can set atags
only when TPL ative it(creating the valid atags header).

Change-Id: I579d31e0880f35193b9c017fc83cbe0f5a25bfb3
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:31:13 +08:00
Joseph Chen e8b8350080 rockchip: resource: dump android version and build time
It prints like: "Android 8.1, Build 2019.7", maybe helpful
for debugging.

Change-Id: I10acbb6e8d864ae2daa2621bf9cfdf4b902a49b4
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:30:53 +08:00
Joseph Chen 2208cd926b rockchip: board: clean up code
Change-Id: Ic4cdd4b54514a4c89f5603063ca791e9efa39193
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:30:20 +08:00
Joseph Chen 1476830723 cmd: bootrkp: clean up code
Change-Id: Ic76a6cabca67263a792eece7ecc7ee46e521ef97
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-19 11:29:56 +08:00
Joseph Chen d14162bd80 common: rkimg: clean up code
Change-Id: I392fce121353b6ae51fcd016b3ba5cedeb033757
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-18 16:43:09 +08:00
Algea Cao 3f6d16ab3d drm/rockchip: dw-hdmi: Fix yuv422 display err
When switching from another color to yuv422, neither
encoder input color nor encoder output color is rgb.
CSC coeff will be incorrectly selected as
csc_coeff_full_to_limited, which causes the display
turn to green. To solve this problem, choose
csc_coeff_full_to_limited only if the input and output
colors are both RGB.

Change-Id: If09f53fb2a5aa20359efb548b1a8b7da2c79310d
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-07-18 14:59:49 +08:00
Algea Cao b5016cf2d5 drm/rockchip: dw-hdmi: Support hdmi quantization range setting
Adding hdmi quantization range switching function. The current
version use default quant range, subsequent version will keep consistent
with the kernel Setting.

Change-Id: Ibb93f7c08d72322caa15f12b1d6e1f901371b27b
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-07-18 14:59:49 +08:00
Joseph Chen af4fa70793 common: android: format address with "0x%08lx"
Change-Id: Icbb0d31541fab9d66043834a28f995da8b9ab087
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2019-07-17 16:50:28 +08:00
Jon Lin 26e23df7b8 rkflash: add new SPI Nannd flash
GD5F1GQ4R

Change-Id: Ie2077814963f564318cda4777a0c91bbacb4c1fb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2019-07-17 14:05:09 +08:00
Jason Zhu 9f7520289f configs: rk3399pro: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
partition. But in routine situation, scan the storage device to find
whether RPMB exist. If not, then use the security partition. So in
conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.

fixes: b9a7e756c4
(lib: optee_client: change the condition for eMMC devices)

Change-Id: I2abed8b06292ce68c09b5bcfc6d0ef9bd19b080f
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-16 10:01:47 +08:00
Jason Zhu b5c685eb33 configs: rk3399: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
partition. But in routine situation, scan the storage device to find
whether RPMB exist. If not, then use the security partition. So in
conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.

fixes: b9a7e756c4
(lib: optee_client: change the condition for eMMC devices)

Change-Id: I5b26d9ac988f45f4dd3627542c2d2eec9b6ca1f2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-16 09:59:43 +08:00
Jason Zhu d075d60b97 configs: rk3368: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
partition. But in routine situation, scan the storage device to find
whether RPMB exist. If not, then use the security partition. So in
conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.

fixes: b9a7e756c4
(lib: optee_client: change the condition for eMMC devices)

Change-Id: Iae4d1ea91fef4e4355babd88e54277e24ff17edd
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-16 09:58:44 +08:00
Jason Zhu 6ad43d645c configs: rk3288: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
partition. But in routine situation, scan the storage device to find
whether RPMB exist. If not, then use the security partition. So in
conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.

fixes: b9a7e756c4
(lib: optee_client: change the condition for eMMC devices)

Change-Id: I50054102e03ae5925a35124ccbedd3f7cebce5f5
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-16 09:57:32 +08:00
Jason Zhu 38b5f44a82 configs: rk3128x: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
partition. But in routine situation, scan the storage device to find
whether RPMB exist. If not, then use the security partition. So in
conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.

fixes: b9a7e756c4
(lib: optee_client: change the condition for eMMC devices)

Change-Id: Ieb9c9e49df3b18fa6a9b459469e8c9c0377192ac
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
2019-07-16 09:56:27 +08:00