This patch fixes the following issues for rk3568 usb2 phy.
1. Set utmi opmode to normal mode for rk3568 usb phy when usb
phy enter suspend mode via usb phy grf. It can help to avoid
the DM/DP floating and the line state be detected as 2'b11.
2. Fix the offset of INT_STATUS_CLR. It can help to avoid
triggering the linestate irq constantly.
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ic108e116d1473341b61743ec4244bc034a95f501
RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the
OTG port of PHY0 support OTG mode with charging detection
function, they are similar to previous Rockchip SoCs.
However, there are three different designs for RK3568 USB 2.0 PHY.
1. RK3568 uses independent USB GRF module for each USB 2.0 PHY.
2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB.
3. The two ports of USB 2.0 PHY share one interrupt.
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ia33d3de222a6c7f263290f4098d0a5e557a9d568
This implements the Type-C PHY driver for Rockchip platform
with Cadence IP block.
Change-Id: I4d74aadbae10f743c9daec8f97aadb8458e740fc
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Get vbus regulator from DT and manage it when phy power on/off.
Change-Id: Iad6742eb47906b0d13ea1e697a5540e69adb2bd1
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This implements the USB3.0 PHY driver for Rockchip platform
with Inno IP block.
Change-Id: I161915cf36fec441822f5f151f017ba8a7ecff9f
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Naneng PHY. It can be used for the otg phy
and host phy, typically, otg phy is used for DWC3, and the
host phy is shared between the EHCI and OHCI controllers.
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I76a8470dbc5ec789e60cee4ec8ad9a56e73c9841
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Change-Id: I68fd5734d6460c169fa5ee2893c57cb5d73340b6
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit b08c8c4870831c9315dcae237772238e80035bd5)
This patch adds rk3399 USB 2.0 PHY0 and PHY1 configurations
for VBUS detect and Charge Type detect.
Change-Id: If520c3aae1b3aa2165590e3d3b1da1ab9f67b7f6
Signed-off-by: William Wu <william.wu@rock-chips.com>
Amend getting usb-phy device by name instead of by index in case that
various phy devices were existed in DT.
Change-Id: I39e094e0319706554703c52997dd132d9a3e1fad
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This patch adds usb 2.0 phy otg-port and host-port
configurations for rk3368.
Change-Id: I1b5f6945a23449122f123cbf5aac22de2d803728
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch add phy configuration for rk322x, and
open pre-emphasize in non-chirp state for otg port.
Change-Id: I33d1d64fd3dfe6a328ec0695ff6e648280860137
Signed-off-by: William Wu <william.wu@rock-chips.com>
The driver of u2phy use either grf or usbgrf to detect charger type.
But the register is divide into two parts both in grf and usbgrf in
rv1108. So rebase the regitster in usbgrf to grf register to make
sure that the driver can use a same base address.
Change-Id: I90ac8164b4dce2412a21ed7b5a5180dca1e9af3c
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
The CDP is a charger type combine with USB host, so allow
gadget work when detect CDP charger type.
Change-Id: I9a6a39cd0b3c22139827c8cee15ba4b32526d5a2
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Add compatible of rk3308, using the data of rk3328.
Change-Id: I4cda504d1ec15546f02a760f5c164a663424aa4c
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The wrong type of charger was reported when there was not usb-cable
plugged in. This change adds USB-Vbus status checking before do charge
detection to fix it.
Change-Id: I5e35414d40fdfe8d07ab2aa0771490e86a97e248
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Checked the usb-vbus status after the download key had been pressed in
case of there was no usb-cable plugged in PC.
Change-Id: Iece797be68f0f3094f3137e4c90a53000fb9ffe2
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This change adds child node bind to support live-tree feature.
Change-Id: Ida629ad281f09673e19ee8beb125792f8b0c60a2
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This change amend getting PHY udevice direct instead of parsing
ofnode_path step by step.
Change-Id: I145f5ef8361c471f3e69f193430e98ef8168b901
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Fix condition logic error in rockchip_usb2phy_parse().
Change-Id: I51d2e97d73f9fc81295d424f97737f00d0e846d7
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
The USB-PHY may have been in suspend mode before done "reboot loader"
action which will cause the USB device failed to be enumerated by PC
in u-boot context.
So reset USB-PHY and power on its PLL in otg_phy_init(), and invoked
by udc_enable() when the USB Gadget start to fix it.
Change-Id: Ie91fdabece937a6f277cfe80cd707ddcace6470d
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Suspend USB-PHY while doing charge detect and resume it after
finishing to ensure the USB-PHY in normal state.
In addition, disable idm_sink_en and vdp_src_en after primary
detection retry to fix the USB device failed to be enumerated
after do charge detect.
Change-Id: Id1effb049cc6491bcd876aa1cc0449469b11df06
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
In file included from drivers/phy/phy-rockchip-inno-usb2.c:8:0:
./arch/arm/include/asm/arch/clock.h:93:29: warning: 'struct udevice'
declared inside parameter list [enabled by default]
./arch/arm/include/asm/arch/clock.h:93:29: warning: its scope is only
this definition or declaration, which is probably not what you want
[enabled by default]
Change-Id: I2a17d469c70897b2a2024c71054b72c76b409f4e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since the parent of udevice is always exist, the previous logic
would be failed to get grf_base when usb-phy nodes was as a child
node of root_driver. This patch fixup it.
Change-Id: I8cb9ee2f4b703a030ec8e129d4d947f11006fe3c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Innosilicon PHY. It can be used for the
PHY with two usb ports, typically, one port is used for
DWC2, the other port is shared between the EHCI and OHCI
controllers.
Change-Id: I00634c5fcfd93ed55b8332e27d915ca587bd2783
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This driver is used to stub PHY operations in a driver (USB, SATA).
This is useful when the 'client' driver (USB, SATA, ...) uses the PHY
framework and there is no actual PHY harwdare to drive.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
phy->dev need to be set to NULL in case of generic_phy_get_by_index()
fails. Then phy->dev can be used to check if the phy is valid
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a78
("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add PCIE analog parameters initialization values according to
latest ETP.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
No functional change.
The variable name "comphy_index" is misleading, it represents
cp index and not comphy index.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add SFI analog parameters initialization values according to
latest ETP.
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
since now the COMPHY can also be ignored, we must know the
state of the COMPHY. we cannot assume anymore that a missing
COMPHY is unconnected.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The comphy configuration is incorrect.
Set the correct values for SGMII.
In addition, remove xaui from the comment as it is not supported.
Signed-off-by: Yoav Gvili <ygvili@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch adds the option to configure a comphy to 5G XFI mode.
In order to configure the comphy to 5G XFI, update
the comphy node in the device-tree:
phy2 {
phy-type = <PHY_TYPE_SFI>;
phy-speed = <PHY_SPEED_5_15625G>;
};
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add SATA analog parameters initialization values according to
latest ETP.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Ren Jianing
Joseph Chen
Frank Wang
Masahiro Yamada
William Wu
MengDongyang
Kever Yang
Wu Liang feng
Jean-Jacques Hiblot
Patrice Chotard
Simon Glass
Tom Rini
Igal Liberman
Stefan Roese