Commit Graph

13524 Commits

Author SHA1 Message Date
Joseph Chen 275a49e3fb irq: gicv3: use cpu interface system registers for gicc read/write
RK3568 only support cpu interface system registers access.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie89380e49ee61afe57560dcc4eba6233f2aca3f2
2020-10-28 21:23:07 +08:00
Joseph Chen 3582f7fa15 ram: Kconfig: select RKPARM_PARTITION by RAMDISK_RO
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Idb6ff31bf8ca4f9bf9a8fb5f0fb447236a9f8e76
2020-10-28 21:23:07 +08:00
Jason Zhu b7b235505b mmc: sdhci: support new phy IP
The new phy IP is designed by rockchip.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I5a84bcc6fff7aaf0bc848cdb70b78a57f471e51e
2020-10-28 15:03:46 +08:00
Jason Zhu 05f3b0ab30 mmc: sdhci: clean up the phy code
Different platform has different phy IP, distinguish them by
the compatible data.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Iaf78eee8abe7e9cd91c1edcd42fd65a611c3b0be
2020-10-28 15:03:46 +08:00
Elaine Zhang 392d4cef34 clk: rockchip: rk3568: update the clk config
modify the cpll and gpll register.
support Hpll set/get rate.

Change-Id: I46b372078435bc70a34d1402d43ce2431110ddbd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-10-26 16:25:37 +08:00
Finley Xiao a4c57e8a07 rockchip: otp: Add support for rv1126
This adds the necessary data for handling otp on the rv1126.

Change-Id: Ie78ad04861ee8dca506f0bb7b851570b360694de
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-10-23 15:06:11 +08:00
Jianqun Xu 230491661d io-domain: rockchip: add rk3568 support
Change-Id: Ic3a984043e82bd65957239acc25de79e00e1a6b8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-10-23 15:02:15 +08:00
Jianqun Xu 3f4af2112b pinctrl: rockchip: add rk3568 support
Change-Id: Ie8c3d6f6a3909ab481241b98d3af55b26c38accc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-10-23 15:02:15 +08:00
CanYang He e8885e2486 drivers: ram: rv1126: dram 32bit interface use pageclose
after system test, 32bit interface use pageclose can improve
performance, 16bit interface not improve.

Change-Id: Iecac7aae1e5f8ec4f162200d80be16f1b91180f5
Signed-off-by: CanYang He <hcy@rock-chips.com>
2020-10-23 15:01:23 +08:00
YouMin Chen da1862e965 drivers: ram: rv1126: fix the timing about noc burstpenalty
Change-Id: I1ce56c57f8798dfc4fbefd68d47fbe97de6c390a
Signed-off-by: YouMin Chen <cym@rock-chips.com>
2020-10-23 15:01:00 +08:00
Elaine Zhang 417bebc456 clk: rockchip: rk3568: Add clock driver
Add basic clock for rk3568 which including cpu, bus, mmc,
i2c, pwm, gmac ...clocks init.

Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-10-22 19:39:19 +08:00
Joseph Chen c3723ef337 clk: rockchip: rk3399: support crypto clk set/get in SPL
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I159d062320ca523e8dc4f0dcce94a619692481f3
2020-10-22 16:37:49 +08:00
Jon Lin 6524556d8d mtd: mtd_blk: Fix the way to get Nand mtd_info
Change-Id: I6e47180db41242a92ac74083d5984bcb06d92e9c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-19 11:00:29 +08:00
Yifeng Zhao 6f8d5ecc09 spl: nand: add mtd erase size config for mtd blk
The mtd blk need mtd erase size to check bad block.x

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If1bca0ce442599be41f3fd12638529018885f3e0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-16 17:57:43 +08:00
Jon Lin 3ac03e839f mtd: spinand: Support FM25S02A
Change-Id: I855a01500977285c4b8eb09ec1c013a4cdb5636e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-15 16:02:18 +08:00
Jon Lin 9f568152b6 rkflash: Fix last data block vpn has been modify issue
Change-Id: Ie3aa7140c368693ddd18a53225975ec2fd6ce141
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-10-10 14:54:28 +08:00
Dayao Ji 40a6a2cba2 fastboot: add virtual A/B feature support
Add "fasboot getvar snapshot-update-status" support and
prevent erase/wipe of userdata/metadata when virtual A/B
merge status is MERGING or SNAPSHOTTED (+source slot !=
current slot).

Signed-off-by: Dayao Ji <jdy@rock-chips.com>
Change-Id: Ibb6ea5778b78b2601178f489d6efcee60d5d0a49
2020-09-23 19:01:12 +08:00
Jon Lin e091dc9d13 mtd: mtd_blk: Map table length round up to erase size
Change-Id: I5f615d37a572ce0d8ceb8d6d6b76983fc61e316b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-17 15:20:49 +08:00
Jason Zhu 51ceae363d mtd: mtd_blk: support map bad block table in spl
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I48112628812b948e4ab5a34362c8ada12b00471e
2020-09-17 15:20:49 +08:00
Jon Lin 2ac88c1bbc rkflash: Check bad block mark in spare 1st and 2nd byte
Change-Id: I60bb761d1f7a015c76939db165c53bf53bd514cf
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-17 14:40:02 +08:00
Jon Lin 03d86fc3c0 mtd: spinand: Support FM25S01A
Change-Id: I805cbf0e8bc47cd9bd94fd296dbaf46921490f15
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-16 12:58:33 +08:00
Jon Lin f28847a81d rkflash: Simplify SPI Nand flash table
1.Simplify SPI Nand flash table
2.Support new SPI Nand devices
3.Format coding styles

Change-Id: Ie7beae2de5b2165ce7f727aa6eab18d726d0dedc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-16 08:39:00 +08:00
Jon Lin 4d72219b9d rkflash: Remove SFC reset in initial progress
Only when the host work wrong, run SFC reset.

Change-Id: Ia2c7f30e4e93203250dc378f2704942d99d73c55
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-16 08:38:37 +08:00
Jon Lin b66d41c240 mtd: spinand: Support hyf devices
Support HYF1GQ4UPACAE, HYF1GQ4UDACAE

Change-Id: I9b8022d9320150d587b443cfa4cdc7495267795e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-16 08:37:57 +08:00
Tang Yun ping 958e04de67 rockchip: rv1126: tpl: thunder boot use SPL_KERNEL_BOOT
Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.

Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2020-09-16 08:37:30 +08:00
Jon Lin 247c5a81b3 mtd: spinand: Add initial support for the MX35LF4GE4AD
Change-Id: Ib1228650e76dc82bc86fb28472616d0fefb269bf
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-15 09:42:28 +08:00
Jon Lin d30345d690 mtd: spinand: Add initial support for the MX35LF2GE4AD
Change-Id: Iab488487f9937d31cf419757988a4152f359e62b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-12 20:41:43 +08:00
Jon Lin 65c356141d spi: rockchip_sfc: Limit io rate to 100MHz
Change-Id: Icec10dbe65d5bbef72b858447aa15e848084712b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-08 17:51:24 +08:00
Jon Lin 853fc11fcc blk: Add BLK_MTD_CONT_WRITE tag
Change-Id: I72537387912d5c981dbe205c0d0c1864fa42a555
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-08 17:51:23 +08:00
Jason Zhu 4d62a7e032 blk: remove unused code
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ib43223baa7d335f6810f714fd64c40cd314b0185
2020-09-07 14:53:06 +08:00
Elaine Zhang 62be0c2c53 clk: rockchip: rk3368: support get pll config by table
add some special pll configs for better clock jitter.

Change-Id: I3484d36feb9f4b99a42a2ba532ae2015968d83ff
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-04 14:22:54 +08:00
Joseph Chen c9f753f3de misc: rockchip decompress: use flush_dcache_all() before decompress
flush_dcache_all() operating on set/way is faster than
flush_cache() and invalidate_dcache_range() operating
on virtual address.

Tested: it saves about 12.5ms in rv1126 thunder-boot.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie8ba42f56e72d0d554dca3949573196ef2165bd7
2020-09-02 16:35:16 +08:00
Jon Lin d38748a7d2 mtd: spinand: Support DS35X2GA
Change-Id: I05e3a0d28983cf24a8a7ba0aee23e434cda4a1a9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-01 14:44:03 +08:00
Jon Lin f1b20f5a45 rkflash: Support FS35ND02G-S3Y2
Change-Id: Ifd62df6188c09fc9fccf4a38bd7c856bc8061d80
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-01 14:43:56 +08:00
Jianqun Xu 72832ab675 pinctrl: rockchip: add rk3308 support
Change-Id: Id2a34aa7984ee00da2bf78e55f38cf268a2ce8f3
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-08-31 16:03:47 +08:00
Jianqun Xu e20d80255b pinctrl: rockchip: add rk1808 support
Change-Id: Iac6b15651e19b7eaf6dd18339f6de6d65a3dd1ff
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-08-31 16:03:47 +08:00
Jianqun Xu 92b1d31aeb pinctrl: rockchip: add rv1126 support
Keep rv1126 support in pinctrl-rockchip.c with legency

Change-Id: I50791c3c30e6efa58d324eaef7bfc4d4aa9e440c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-08-31 16:03:47 +08:00
Jianqun Xu b8d3e6ff7d pinctrl: rockchip: set mux route in core driver
Change-Id: Iccc880b150b1cea3cef9d2a84d14a0e82ce5c5cf
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-08-31 16:03:47 +08:00
Jianqun Xu 3624458ab0 pinctrl: rockchip: put nr_pins to pinctrl info structure
Put the nr_pins information to pinctrl info structure, instead of
calculating in probe.

Change-Id: I3af11d99ef4b0e30c306ebd99a2233cd0c6b97b5
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-08-31 16:03:47 +08:00
David Wu 5635c457ec UPSTREAM: pinctrl: rockchip: Also move common set_schmitter func into per Soc file
Only some Soc need Schmitter feature, so move the
implementation into their own files.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 79d16e45409f928c952b6935d695cd08f9db76b3)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I41ede5737258292e27492e391cf9a981210e4a71
2020-08-31 16:03:47 +08:00
David Wu b8a0fe4c87 UPSTREAM: pinctrl: rockchip: Clean the unused type and label
As the mux/pull/drive feature implement at own file,
the type and label are not necessary.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 623aca88308b4f917f0465cd5dd1514ee781bee8)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Idcbb3fdf4311567c599686d52926a057d1101b6b
2020-08-31 16:03:47 +08:00
David Wu cfe427fe38 UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull
RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 69a38f81bb55893a8555c899319305c539226a0a)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Ie8f94cf1a0b33a24bb32d3de8231b7f2db51ddff
2020-08-31 16:03:47 +08:00
David Wu 05a5688e53 UPSTREAM: pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file
for each Soc.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 743a77373bfa22ca099b30d4ac88d95a2f98d1b6)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Ib0de627d3aee1759965d64852bcd287785538dc0
2020-08-31 16:03:47 +08:00
David Wu 79899a49f9 UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength
RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 956362c84b0422ea99da947feca2878193c26ade)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I409107119d557b953c904b53e657685907879a3a
2020-08-31 16:03:47 +08:00
David Wu 681441e641 UPSTREAM: pinctrl: rockchip: Split the common set_drive() func into per Soc
As the common set_mux func(), implement the feature at the own file
for each Soc.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 625ab11fdae3daf346647aaba59abee804e34589)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I07caae48cd4699aa7bbddf2edf7de6863c0a58c2
2020-08-31 16:03:47 +08:00
David Wu aa570f0140 UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cd8f00ce08102d2dbb350c76bbb53f7b0f804b7d)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I7aaaf9642ee7bed6a2e9f6538a053bd6e1810dd7
2020-08-31 16:03:47 +08:00
David Wu 5f55bbd7d6 UPSTREAM: pinctrl: rockchip: Split the common set_mux() into per Soc
Such as rk3288's pins of pmu_gpio0 are a special feature, which have no
higher 16 writing corresponding bits, use common set_mux() func would
introduce more code, so implement their set_mux() in each Soc's own
file to reduce the size of code.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 54e75702c48a9757e82cbe71176c0b5ddcf6a092)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Ifdfce706e9b1cbe94300d2bed91182033f23f301
2020-08-31 16:03:47 +08:00
David Wu 16f7081913 UPSTREAM: pinctrl: rockchip: Remove redundant spaces
Some files have the redundant spaces, remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 8541beb86daf3ce7e4be9ca67859aab3dd0daefb)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I9f621c3714260165bab0111e486a1d60ecf33c11
2020-08-31 16:03:47 +08:00
David Wu 8fa6c06288 UPSTREAM: pinctrl: rockchip: Add pull-pin-default param and remove unused param
Some Socs use the pull-pin-default config param, need to add it.
And input-enable/disable config params are not necessary, remove it.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 0a5cc3cac96dcbb1f31c9c2a3954dad702a543c1)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Id7522a4fdd21d42d46c42e6f66b93985064fd9ab
2020-08-31 16:03:47 +08:00
David Wu 49b3d5d5ff UPSTREAM: pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
There are no higher 16 writing corresponding bits for pmu_gpio0's
iomux/drive/pull at rk3288, need to read the value from register
firstly. Add the flag to distinguish it from normal registers.

Signed-off-by: David Wu <david.wu@rock-chips.com>
(cherry picked from commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: Ibf0ba2d879904a06a2fb6722f5886a39c010a7f7
2020-08-31 16:03:47 +08:00