The write loader function may call by mistake if the system
is unstable, which will cause flash reading and writing errors
and data loss.
bug log:
MT RR 15 row=dae38,count 15,status=-1
MT RR 15 row=dae38,count 15,status=-1
flash_read_page_en 0 dae38 error_ecc -1 1
load_l2p_region = 0,2,ffffffff, dae1e
Change-Id: Iac55e7807d739f08146ea2d81265857e6136e5d0
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
bug:
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
Change-Id: Id77a8f8df8e014e8de5dc0845ee0e3dd5d945f97
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
1. support spectek L84C/L84D/L05B NAND FLASH
2. add vendor read and write api
3. set ftl version v1.14
Change-Id: I483a451acdbdc3b3bfde79dd0ea8689a2b7351ee
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
The boot loader image write to lba 0x40, the nand driver
will copy to the the reserved blocks for bootrom.
Change-Id: I7517818b39032bc8ff16cbb4a9e9342f95306181
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
1. Garbage collection does not deal with the updated blocks.
2. Static wear considers the SLC mode erase count and XLC
mode erase count
Change-Id: I6054fbc1726be1c93558eafad59fa9ea38d6a206
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
The FTL cache the last page of the write data, it will lose
after reboot. Here need to add a cache flush operation after
write the data to resolve it.
Change-Id: Ie197fad9f9e23ce5337be87f5d8380decad731b7
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
The NANDC version number definition is not compatible with the
original. So the detect code need to update.
Change-Id: I9a062158a1bd20b83050d17f02661cb429b55092
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
When NAND FLASH reads and writes with UECC, it may lose data.
Add a additional reading process to restore the data.
Change-Id: I3345d4889775547e342db41a0aa3457356b1c605
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
fix error:
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_DM_PWM
Please add these via Kconfig instead. Find a suitable Kconfig
file and add a 'config' or 'menuconfig' option.
Change-Id: I893a18eb1c36e28307379872814532ba825be586
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk_zftl_arm_xx is new ftl for support 2D/3D TLC/MLC NAND FLASH.
rk_ftl_arm_xx is legacy ftl for support 2D MLC NAND FLASH
Change-Id: I80794998562a8916e634f533d1b917bf8aab4d91
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
ftl_read api with un-aligned data buffer will return error data.
Change-Id: I380667d6d671dd96578830939d137fe74015d8ac
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
The nand driver used dma to tranfer data and need flush cache.
Change-Id: I8441621a6d411a45bfaccc0a0c1302da6d900741
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
This patch add the nand flash support for Rockchip Soc(RK3128, RK3126x,
RK3188, Rk3229 etc).
Change-Id: I35ea09f0714b303b247a97ed13cc6e0e56675a0e
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
Yifeng Zhao
Dingqiang Lin
Kever Yang