if ARCH_ROCKCHIP config ROCKCHIP_PX30 bool "Support Rockchip PX30" select ARM64 select GICV2 select ARM_SMCCC select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select TPL_TINY_FRAMEWORK if TPL imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select DEBUG_UART_BOARD_INIT help The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. if ROCKCHIP_PX30 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" config TPL_TEXT_BASE default 0xff0e1000 config TPL_MAX_SIZE default 10240 config ROCKCHIP_RK3326 bool "Support Rockchip RK3326 " help RK3326 can use most code from PX30, but at some situations we have to distinguish between RK3326 and PX30, so this macro gives help. It is usually selected in rk3326 board defconfig. endif config ROCKCHIP_RK3036 bool "Support Rockchip RK3036" select CPU_V7 select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL select DEBUG_UART_BOARD_INIT select ARM_SMCCC help The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3128 bool "Support Rockchip RK3128" select CPU_V7 select GICV2 select ARM_SMCCC help The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. if ROCKCHIP_RK3128 config ROCKCHIP_RK3126 bool "Support Rockchip RK3126 " help RK3126 can use most code from RK3128, but at some situations we have to distinguish between RK3126 and RK3128, so this macro gives help. It is usually selected in rk3126 board defconfig. config ROCKCHIP_PX3SE bool "Support Rockchip PX3SE" help PX3SE is a variant of RK3128, it shares codes with RK3128, but we still need this macro to distinguish PX3SE and RK3128. endif config ROCKCHIP_RK3066 bool "Support Rockchip RK3066" select CPU_V7 select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER select SPL_ROCKCHIP_EARLYRETURN_TO_BROM help The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK3188 bool "Support Rockchip RK3188" select CPU_V7 select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SPL select SPL_CLK select SPL_REGMAP select SPL_SYSCON select SPL_RAM select SPL_DRIVERS_MISC_SUPPORT select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two video interfaces, several memory options and video codec support. Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. config ROCKCHIP_RK322X bool "Support Rockchip RK3228/RK3229" select CPU_V7 select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_DRIVERS_MISC_SUPPORT imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select ROCKCHIP_BROM_HELPER select DEBUG_UART_BOARD_INIT select TPL_LIBCOMMON_SUPPORT select TPL_LIBGENERIC_SUPPORT select GICV2 select ARM_SMCCC help The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. if ROCKCHIP_RK322X config ROCKCHIP_RK3128X bool "Support Rockchip RK3128X " help RK3128X can use most code from RK322X, but at some situations we have to distinguish between RK3128X and RK322X, so this macro gives help. It is usually selected in RK3128X board defconfig. endif config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7 select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SPL select GICV2 select ARM_SMCCC help The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK3308 bool "Support Rockchip RK3308" select ARM64 if !ARM64_BOOT_AARCH32 select DEBUG_UART_BOARD_INIT select ARM_SMCCC help The Rockchip RK3308 is a ARM-based Soc which embeded with quad Cortex-A35 and highly integrated audio interfaces. config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 select GICV2 select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT imply SPL_SEPARATE_BSS select DEBUG_UART_BOARD_INIT select ARM_SMCCC help The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. if ROCKCHIP_RK3328 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" config TPL_TEXT_BASE default 0xff091000 config TPL_MAX_SIZE default 28672 config TPL_STACK default 0xff098000 endif config ROCKCHIP_RK3368 bool "Support Rockchip RK3368" select ARM64 select SUPPORT_SPL select SUPPORT_TPL select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select DEBUG_UART_BOARD_INIT select GICV2 select ARM_SMCCC help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache (for the little cluster), PowerVR G6110 based graphics, one video output processor supporting LVDS/HDMI/eDP, several DDR3 options and video codec support. On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. if ROCKCHIP_RK3368 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" config TPL_TEXT_BASE default 0xff8c1000 config TPL_MAX_SIZE default 28672 config TPL_STACK default 0xff8cffff endif config ROCKCHIP_RK3399 bool "Support Rockchip RK3399" select ARM64 select SUPPORT_SPL select SPL select SPL_SEPARATE_BSS select SPL_SERIAL_SUPPORT select SPL_DRIVERS_MISC_SUPPORT select DEBUG_UART_BOARD_INIT select GICV3 select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER select ARM_SMCCC help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. config ROCKCHIP_RK1808 bool "Support Rockchip RK1808" select ARM64 select ARM_SMCCC select DEBUG_UART_BOARD_INIT help The Rockchip RK1808 is a ARM-based Soc which embedded with dual Cortex-A35. config ROCKCHIP_RV1108 bool "Support Rockchip RV1108" select CPU_V7 select SUPPORT_SPL select SUPPORT_TPL select SPL select TPL select BOARD_LATE_INIT help The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 and a DSP. if ROCKCHIP_RV1108 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl.lds" config TPL_TEXT_BASE default 0x10080800 config TPL_MAX_SIZE default 6144 config TPL_STACK default 0x10082000 endif config SPL_ROCKCHIP_BACK_TO_BROM bool "SPL returns to bootrom" default y if ROCKCHIP_RK3036 select ROCKCHIP_BROM_HELPER depends on SPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 select ROCKCHIP_BROM_HELPER depends on TPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. config ARM64_BOOT_AARCH32 bool "Support Boot an ARM64 on AArch32 execution state" select CPU_V7 default n help If you want to boot an ARM64 processor on 32-bit mode, say y here. config ROCKCHIP_BOOT_MODE_REG hex "Rockchip boot mode flag register address" default 0xff010200 if ROCKCHIP_PX30 default 0x200081c8 if ROCKCHIP_RK3036 default 0x100a0038 if ROCKCHIP_RK3128 default 0x20004040 if ROCKCHIP_RK3188 default 0x110005c8 if ROCKCHIP_RK322X default 0xff730094 if ROCKCHIP_RK3288 default 0xff000500 if ROCKCHIP_RK3308 default 0xff1005c8 if ROCKCHIP_RK3328 default 0xff738200 if ROCKCHIP_RK3368 default 0xff320300 if ROCKCHIP_RK3399 default 0xfe020200 if ROCKCHIP_RK1808 default 0x10300580 if ROCKCHIP_RV1108 default 0 help The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) according to the value from this register. config ROCKCHIP_STIMER_BASE hex "Rockchip Secure timer base address" default 0xff220020 if ROCKCHIP_PX30 default 0x200440a0 if ROCKCHIP_RK3036 default 0x2000e000 if ROCKCHIP_RK3066 default 0x20018020 if ROCKCHIP_RK3126 default 0x200440a0 if ROCKCHIP_RK3128 default 0x2000e000 if ROCKCHIP_RK3188 default 0x110d0020 if ROCKCHIP_RK322X default 0xff810020 if ROCKCHIP_RK3288 default 0xff1d0020 if ROCKCHIP_RK3328 default 0xff830020 if ROCKCHIP_RK3368 default 0xff8680a0 if ROCKCHIP_RK3399 default 0x10350020 if ROCKCHIP_RV1108 default 0 help The secure timer inited in SPL/TPL in secure word, ARM generic timer works after this timer work. config ROCKCHIP_IRAM_START_ADDR hex "Rockchip Secure timer base address" default 0xff0e0000 if ROCKCHIP_PX30 default 0x10080000 if ROCKCHIP_RK3036 default 0x10080000 if ROCKCHIP_RK3128 default 0x10080000 if ROCKCHIP_RK3188 default 0x10080000 if ROCKCHIP_RK322X default 0xff700000 if ROCKCHIP_RK3288 default 0xfff80000 if ROCKCHIP_RK3308 default 0xff091000 if ROCKCHIP_RK3328 default 0xff8c0000 if ROCKCHIP_RK3368 default 0xff8c0000 if ROCKCHIP_RK3399 default 0x10080000 if ROCKCHIP_RV1108 default 0 help The IRAM start addr is to locate variant of the boot device from bootrom. config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" default 0 help SPL may need reserve memory for firmware loaded by SPL, whose load address is in IRAM and may overlay with SPL text area if not reserved. config ROCKCHIP_BROM_HELPER bool config SPL_ROCKCHIP_EARLYRETURN_TO_BROM bool "SPL requires early-return (for RK3188-style BROM) to BROM" depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the first stage in segments and enter multiple times. E.g. on the RK3188, the first 1KB of the first stage are loaded first and entered; after returning to the BROM, the remainder of the first stage is loaded, but the BROM re-enters at the same address/to the same code as previously. This enables support code in the BOOT0 hook for the SPL stage to allow multiple entries. config TPL_ROCKCHIP_EARLYRETURN_TO_BROM bool "TPL requires early-return (for RK3188-style BROM) to BROM" depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the first stage in segments and enter multiple times. E.g. on the RK3188, the first 1KB of the first stage are loaded first and entered; after returning to the BROM, the remainder of the first stage is loaded, but the BROM re-enters at the same address/to the same code as previously. This enables support code in the BOOT0 hook for the TPL stage to allow multiple entries. config SPL_MMC_SUPPORT default y if !SPL_ROCKCHIP_BACK_TO_BROM config RKIMG_BOOTLOADER bool "Support for Rockchip Image Bootloader boot flow" default n help Rockchip use this to boot Android during development cycle and for other OS, typical content kernel.img with zImage/Image, boot.img and recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img with dtb and uboot/kernel logo bmp, vendor storage for custom info like SN and MAC address. config ROCKCHIP_RESOURCE_IMAGE bool "Enable support for rockchip resource image" depends on RKIMG_BOOTLOADER default y help This enables support to get dtb or logo files from rockchip resource image format partition. config ROCKCHIP_VENDOR_PARTITION bool "Rockchip vendor storage partition support" depends on RKIMG_BOOTLOADER help This enable support to read/write vendor configuration data from/to this partition. config USING_KERNEL_DTB bool "Using dtb from Kernel/resource for U-Boot" depends on RKIMG_BOOTLOADER && OF_LIVE default y help This enable support to read dtb from resource and use it for U-Boot, the uart and emmc will still using U-Boot dtb, but other devices like regulator/pmic, display, usb will use dts node from kernel. config ROCKCHIP_CRC bool "Rockchip CRC verify images" help This enable support Rockchip CRC verify images. It takes a lot of time, so it is better only used for debug. config ROCKCHIP_SMCCC bool "Rockchip SMCCC" default y if ARM_SMCCC help This enable support for Rockchip SMC calls config ROCKCHIP_DEBUGGER bool "Rockchip debugger" depends on IRQ help This enable support for Rockchip debugger. Now we install a timer interrupt and dump pt_regs when the timeout event trigger. This helps us to know cpu state when system hang. config ROCKCHIP_CRASH_DUMP bool "Rockchip crash dump registers" help This enable dump registers when system crash, the registers you would like to dump can be added in show_regs(). config ROCKCHIP_PRELOADER_ATAGS bool "Rockchip pre-loader atags" default y if ARCH_ROCKCHIP help This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF, tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders and finally ends with U-Boot. config GICV2 bool "ARM GICv2" config GICV3 bool "ARM GICv3" source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3066/Kconfig" source "arch/arm/mach-rockchip/rk3128/Kconfig" source "arch/arm/mach-rockchip/rk3188/Kconfig" source "arch/arm/mach-rockchip/rk322x/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3308/Kconfig" source "arch/arm/mach-rockchip/rk3328/Kconfig" source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" source "arch/arm/mach-rockchip/rk1808/Kconfig" source "arch/arm/mach-rockchip/rv1108/Kconfig" endif