Jagan Teki 46d0a9913c spi: Add zynq qspi controller driver ... Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support. => sf probe SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB => mw.b 0x100 0xCC 0x1000000 => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s => sf read 0x3000000 0x0 0x1000000 device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK => cmp.b 0x3000000 0x100 0x1000000 Total of 16777216 byte(s) were the same Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>		2015-10-25 20:17:01 +05:30
..
Kconfig	spi : convert altera_spi to driver model	2015-10-23 07:36:56 +08:00
Makefile	spi: Add zynq qspi controller driver	2015-10-25 20:17:01 +05:30
altera_spi.c	spi : convert altera_spi to driver model	2015-10-23 07:36:56 +08:00
armada100_spi.c	…
atmel_dataflash_spi.c	…
atmel_spi.c	…
atmel_spi.h	…
bfin_spi.c	…
bfin_spi6xx.c	…
cadence_qspi.c	…
cadence_qspi.h	…
cadence_qspi_apb.c	…
cf_qspi.c	…
cf_spi.c	…
davinci_spi.c	bitops: introduce BIT() definition	2015-09-11 17:15:32 -04:00
designware_spi.c	dm: Use dev_get_addr() where possible	2015-08-31 07:57:26 -06:00
ep93xx_spi.c	bitops: introduce BIT() definition	2015-09-11 17:15:32 -04:00
exynos_spi.c	dm: Use dev_get_addr() where possible	2015-08-31 07:57:26 -06:00
fsl_dspi.c	dm: Use dev_get_addr() where possible	2015-08-31 07:57:26 -06:00
fsl_espi.c	…
fsl_qspi.c	…
fsl_qspi.h	…
ich.c	x86: spi: Add support for Wildcat Point	2015-10-21 07:46:27 -06:00
ich.h	…
kirkwood_spi.c	…
lpc32xx_ssp.c	…
mpc8xxx_spi.c	…
mpc52xx_spi.c	…
mxc_spi.c	…
mxs_spi.c	Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header	2015-09-11 17:15:20 -04:00
omap3_spi.c	…
omap3_spi.h	spi: omap3_spi: add am43xx support to omap3_spi	2015-08-12 20:48:02 -04:00
rk_spi.c	rockchip: Add SPI driver	2015-09-02 21:28:24 -06:00
rk_spi.h	rockchip: Add SPI driver	2015-09-02 21:28:24 -06:00
sandbox_spi.c	…
sh_qspi.c	…
sh_spi.c	…
sh_spi.h	…
soft_spi.c	…
soft_spi_legacy.c	…
spi-emul-uclass.c	…
spi-uclass.c	…
spi.c	…
tegra20_sflash.c	dm: Use dev_get_addr() where possible	2015-08-31 07:57:26 -06:00
tegra20_slink.c	spi: tegra20: Add support for mode selection	2015-10-11 16:43:06 +05:30
tegra114_spi.c	dm: Use dev_get_addr() where possible	2015-08-31 07:57:26 -06:00
tegra_spi.h	…
ti_qspi.c	spi: ti_qspi: Use DMA to read from qspi flash	2015-08-17 23:29:15 +05:30
xilinx_spi.c	spi: xilinx_spi: Fix to configure CPOL, CPHA mask	2015-10-11 16:43:06 +05:30
zynq_qspi.c	spi: Add zynq qspi controller driver	2015-10-25 20:17:01 +05:30
zynq_spi.c	spi: zynq_spi: Fix to configure CPOL, CPHA mask	2015-10-11 16:43:06 +05:30