cf9110094e
DPTPHYT22ULP is designed for chips that perform eDP/DP data communication while operating at low power consumption. The main link is a multi-gigabit transmitter macro which enable speed up to 4.0Gbps data transmitter with optimized power and die size, also it can be easily fabricated and implemented in a video system. The AUX channel is a halfduplex, bidirectional channel consisting of one differential pair, supporting the bit rate of about 1Mbps. Macro consists of multi-main link transmitter channels, AUX channel, one PLL and bias-gen unit. The main link transmitter performs dedicated P2S, clock generator, driver with preemphasis and self-test. Each of the channels can be turned off individually. Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: Ic60d8bb86a53f686e8c46323b58d099c727a36d3 |
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| .. | ||
| marvell | ||
| Kconfig | ||
| Makefile | ||
| nop-phy.c | ||
| phy-rockchip-inno-usb2.c | ||
| phy-rockchip-inno-usb3.c | ||
| phy-rockchip-naneng-edp.c | ||
| phy-rockchip-naneng-usb2.c | ||
| phy-rockchip-typec.c | ||
| phy-uclass.c | ||
| sandbox-phy.c | ||
| sti_usb_phy.c | ||
| ti-pipe3-phy.c | ||