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Simon Glass d1cd045982 x86: Emit post codes in startup code for Chromebooks 
On x86 it is common to use 'post codes' which are 8-bit hex values emitted
from the code and visible to the user. Traditionally two 7-segment displays
were made available on the motherboard to show the last post code that was
emitted. This allows diagnosis of a boot problem since it is possible to
see where the code got to before it died.

On modern hardware these codes are not normally visible. On Chromebooks
they are displayed by the Embedded Controller (EC), so it is useful to emit
them. We must enable this feature for the EC to see the codes, so add an
option for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
 		2014-11-21 07:34:11 +01:00
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Marvell kconfig: arm: select CPU_V7 for some new boards 2014-11-13 08:37:18 -05:00
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google x86: Emit post codes in startup code for Chromebooks 2014-11-21 07:34:11 +01:00
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keymile cppcheck cleanup: fix nullPointer errors 2014-11-07 16:27:07 -05:00
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scb9328 cppcheck cleanup: fix nullPointer errors 2014-11-07 16:27:07 -05:00
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siemens arm, spl, at91: add spl support for the corvus board 2014-11-17 08:47:18 -05:00
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